Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx

[u-boot] / arch / powerpc / cpu / mpc85xx / ddr-gen3.c

diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index 8bed5fe925b8130ecc1d14aba850881c8242fa02..f118dd5daf0a08e3fc3994951844217457cc6db7 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
@@ -22,8 +22,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
        volatile ccsr_ddr_t *ddr;
        u32 temp_sdram_cfg;
        u32 total_gb_size_per_controller;
-       int timeout, timeout_save;
+       int timeout;
 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
+       int timeout_save;
        volatile ccsr_local_ecm_t *ecm = (void *)CONFIG_SYS_MPC85xx_ECM_ADDR;
        unsigned int csn_bnds_backup = 0, cs_sa, cs_ea, *csn_bnds_t;
        int csn = -1;
@@ -140,6 +141,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
                        out_be32(&ddr->debug[i], regs->debug[i]);
                }
        }
+#ifdef CONFIG_SYS_FSL_ERRATUM_A_004934
+       out_be32(&ddr->debug[28], 0x00003000);
+#endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003474
        out_be32(&ddr->debug[12], 0x00000015);
@@ -302,7 +306,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
                        >> SDRAM_CFG_DBW_SHIFT);
        timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 /
                (get_ddr_freq(0) >> 20)) << 1;
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
        timeout_save = timeout;
+#endif
        total_gb_size_per_controller >>= 4;     /* shift down to gb size */
        debug("total %d GB\n", total_gb_size_per_controller);
        debug("Need to wait up to %d * 10ms\n", timeout);