Merge branch 'master' of git://git.denx.de/u-boot-arm

[u-boot] / arch / powerpc / cpu / mpc85xx / fdt.c

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 8e7b827ffb9e1ed11c8a9bb343688378234d4f00..00fa752996593353216e183a7f6547737817bc97 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern void ft_qe_setup(void *blob);
 extern void ft_fixup_num_cores(void *blob);
+extern void ft_srio_setup(void *blob);
 
 #ifdef CONFIG_MP
 #include "mp.h"
@@ -48,24 +49,41 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
        ulong spin_tbl_addr = get_spin_phys_addr();
        u32 bootpg = determine_mp_bootpg();
        u32 id = get_my_id();
+       const char *enable_method;
 
        off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
        while (off != -FDT_ERR_NOTFOUND) {
                u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 
                if (reg) {
+                       u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
+                       val = cpu_to_fdt32(val);
                        if (*reg == id) {
-                               fdt_setprop_string(blob, off, "status", "okay");
+                               fdt_setprop_string(blob, off, "status",
+                                                               "okay");
                        } else {
-                               u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
-                               val = cpu_to_fdt32(val);
                                fdt_setprop_string(blob, off, "status",
                                                                "disabled");
-                               fdt_setprop_string(blob, off, "enable-method",
-                                                               "spin-table");
+                       }
+
+                       if (hold_cores_in_reset(0)) {
+#ifdef CONFIG_FSL_CORENET
+                               /* Cores held in reset, use BRR to release */
+                               enable_method = "fsl,brr-holdoff";
+#else
+                               /* Cores held in reset, use EEBPCR to release */
+                               enable_method = "fsl,eebpcr-holdoff";
+#endif
+                       } else {
+                               /* Cores out of reset and in a spin-loop */
+                               enable_method = "spin-table";
+
                                fdt_setprop(blob, off, "cpu-release-addr",
                                                &val, sizeof(val));
                        }
+
+                       fdt_setprop_string(blob, off, "enable-method",
+                                                       enable_method);
                } else {
                        printf ("cpu NULL\n");
                }
@@ -461,4 +479,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
        fdt_fixup_qportals(blob);
 #endif
+
+#ifdef CONFIG_SYS_SRIO
+       ft_srio_setup(blob);
+#endif
 }