]> git.sur5r.net Git - u-boot/blobdiff - arch/powerpc/cpu/mpc85xx/fdt.c
GCC4.6: Squash warnings in denali_spd_ddr2.c
[u-boot] / arch / powerpc / cpu / mpc85xx / fdt.c
index d20c94c0f7c1846f5634baeaf41edc2b1f7f33d6..9d31568412a30c89bf63641599d789075551d827 100644 (file)
@@ -504,9 +504,8 @@ void fdt_fixup_fman_firmware(void *blob)
                       fdt_strerror(rc));
                return;
        }
-       phandle = fdt_alloc_phandle(blob);
-       rc = fdt_setprop_cell(blob, fwnode, "linux,phandle", phandle);
-       if (rc < 0) {
+       phandle = fdt_create_phandle(blob, fwnode);
+       if (!phandle) {
                char s[64];
                fdt_get_path(blob, fwnode, s, sizeof(s));
                printf("Could not add phandle property to node %s: %s\n", s,
@@ -538,6 +537,27 @@ void fdt_fixup_fman_firmware(void *blob)
 #define fdt_fixup_fman_firmware(x)
 #endif
 
+#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
+static void fdt_fixup_usb(void *fdt)
+{
+       ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+       u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
+       int off;
+
+       off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
+       if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
+                               FSL_CORENET_RCWSR11_EC1_FM1_USB1)
+               fdt_status_disabled(fdt, off);
+
+       off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
+       if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
+                               FSL_CORENET_RCWSR11_EC2_USB2)
+               fdt_status_disabled(fdt, off);
+}
+#else
+#define fdt_fixup_usb(x)
+#endif
+
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
        int off;
@@ -642,6 +662,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
        do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
                        "clock_freq", gd->bus_clk, 1);
+
+       fdt_fixup_usb(blob);
 }
 
 /*