85xx/b4860: Alternate serdes protocols for B4860/B4420

[u-boot] / arch / powerpc / cpu / mpc85xx / fsl_corenet2_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 39d9409d64bab1442908e3ec8de64fb054aa3b52..70e09eaed5994a9a8516bc7c597efa9ed575fbe4 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -75,6 +75,8 @@ static const char *serdes_prtcl_str[] = {
        [XFI_FM2_MAC9] = "XFI_FM2_MAC9",
        [XFI_FM2_MAC10] = "XFI_FM2_MAC10",
        [INTERLAKEN] = "INTERLAKEN",
+       [QSGMII_SW1_A] = "QSGMII_SW1_A",
+       [QSGMII_SW1_B] = "QSGMII_SW1_B",
 };
 #endif
 
@@ -201,3 +203,24 @@ void fsl_serdes_init(void)
 #endif
 
 }
+
+const char *serdes_clock_to_string(u32 clock)
+{
+       switch (clock) {
+       case SRDS_PLLCR0_RFCK_SEL_100:
+               return "100";
+       case SRDS_PLLCR0_RFCK_SEL_125:
+               return "125";
+       case SRDS_PLLCR0_RFCK_SEL_156_25:
+               return "156.25";
+       case SRDS_PLLCR0_RFCK_SEL_161_13:
+               return "161.1328123";
+       default:
+#if defined(CONFIG_T4240QDS)
+               return "???";
+#else
+               return "122.88";
+#endif
+       }
+}
+