]> git.sur5r.net Git - u-boot/blobdiff - arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
GCC4.6: Squash warnings in denali_spd_ddr2.c
[u-boot] / arch / powerpc / cpu / mpc85xx / fsl_corenet_serdes.c
index 4307a4ccbb5349074b2352ef1fa43dcd0ae17c72..89ed5b47fc9344bd5412a1e75036a8c1762e7c22 100644 (file)
@@ -482,6 +482,13 @@ static void wait_for_rstdone(unsigned int bank)
                printf("SERDES: timeout resetting bank %u\n", bank + 1);
 }
 
+
+void __soc_serdes_init(void)
+{
+       /* Allow for SoC-specific initialization in <SOC>_serdes.c  */
+};
+void soc_serdes_init(void) __attribute__((weak, alias("__soc_serdes_init")));
+
 void fsl_serdes_init(void)
 {
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -497,9 +504,6 @@ void fsl_serdes_init(void)
        const char *srds_lpd_arg;
        size_t arglen;
 #endif
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
-       enum srds_prtcl device;
-#endif
 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001
        int need_serdes_a001;   /* TRUE == need work-around for SERDES A001 */
 #endif
@@ -570,6 +574,8 @@ void fsl_serdes_init(void)
                }
        }
 
+       soc_serdes_init();
+
 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
        /*
         * Bank two uses the clock from bank three, so if bank two is enabled,
@@ -778,11 +784,4 @@ void fsl_serdes_init(void)
                             SRDS_RSTCTL_SDPD);
        }
 #endif
-
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
-       for (device = XAUI_FM1; device <= XAUI_FM2; device++) {
-               if (is_serdes_configured(device))
-                       __serdes_reset_rx(srds_regs, cfg, device);
-       }
-#endif
 }