printf("SERDES: timeout resetting bank %u\n", bank + 1);
}
+
+void __soc_serdes_init(void)
+{
+ /* Allow for SoC-specific initialization in <SOC>_serdes.c */
+};
+void soc_serdes_init(void) __attribute__((weak, alias("__soc_serdes_init")));
+
void fsl_serdes_init(void)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
const char *srds_lpd_arg;
size_t arglen;
#endif
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
- enum srds_prtcl device;
-#endif
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001
int need_serdes_a001; /* TRUE == need work-around for SERDES A001 */
#endif
}
}
+ soc_serdes_init();
+
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
/*
* Bank two uses the clock from bank three, so if bank two is enabled,
SRDS_RSTCTL_SDPD);
}
#endif
-
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
- for (device = XAUI_FM1; device <= XAUI_FM2; device++) {
- if (is_serdes_configured(device))
- __serdes_reset_rx(srds_regs, cfg, device);
- }
-#endif
}