GCC4.6: Squash warnings in denali_spd_ddr2.c

[u-boot] / arch / powerpc / cpu / mpc85xx / interrupts.c

diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index a62b031774835061aa30054705e027fd6dde5fe0..7ab71137f647d5f7959f2d07dcc4bfa3ed7e3703 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -32,11 +32,23 @@
 #include <command.h>
 #include <asm/processor.h>
 #include <asm/io.h>
+#ifdef CONFIG_POST
+#include <post.h>
+#endif
 
 int interrupt_init_cpu(unsigned int *decrementer_count)
 {
        ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
 
+#ifdef CONFIG_POST
+       /*
+        * The POST word is stored in the PIC's TFRR register which gets
+        * cleared when the PIC is reset.  Save it off so we can restore it
+        * later.
+        */
+       ulong post_word = post_word_load();
+#endif
+
        out_be32(&pic->gcr, MPC85xx_PICGCR_RST);
        while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST)
                ;
@@ -78,6 +90,10 @@ int interrupt_init_cpu(unsigned int *decrementer_count)
        pic->ctpr=0;            /* 40080 clear current task priority register */
 #endif
 
+#ifdef CONFIG_POST
+       post_word_store(post_word);
+#endif
+
        return (0);
 }