spl: move FDT_FIXUP_PARTITIONS to Kconfig

[u-boot] / arch / powerpc / cpu / mpc85xx / mpc8548_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
index d14695506a0b27b1740798e0cde6bc13c4ee46b6..f1042d5b586bd5c59042d2456e56a36eecaa6d04 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+       if (!(serdes1_prtcl_map & (1 << NONE)))
+               fsl_serdes_init();
+
        return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -35,6 +38,9 @@ void fsl_serdes_init(void)
                                MPC85xx_PORDEVSR_IO_SEL_SHIFT;
        int lane;
 
+       if (serdes1_prtcl_map & (1 << NONE))
+               return;
+
        debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
 
        if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
@@ -46,4 +52,7 @@ void fsl_serdes_init(void)
                enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane];
                serdes1_prtcl_map |= (1 << lane_prtcl);
        }
+
+       /* Set the first bit to indicate serdes has been initialized */
+       serdes1_prtcl_map |= (1 << NONE);
 }