Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / arch / powerpc / cpu / mpc85xx / p5020_ids.c

diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
index 2911c13884c72217312bbfffe425c70daca56c11..b5d787c8e705e271c4b788ddb1fc0a2a6e220268 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c
@@ -1,23 +1,7 @@
 /*
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -27,19 +11,25 @@
 #ifdef CONFIG_SYS_DPAA_QBMAN
 struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
        /* dqrr liodn, frame data liodn, liodn off, sdest */
-       SET_QP_INFO( 1,  2,  1, 0),
-       SET_QP_INFO( 3,  4,  2, 1),
-       SET_QP_INFO( 5,  6,  3, 2),
-       SET_QP_INFO( 7,  8,  4, 3),
-       SET_QP_INFO( 9, 10,  5, 4),
-       SET_QP_INFO( 0,  0,  0, 5),
-       SET_QP_INFO( 0,  0,  0, 6),
-       SET_QP_INFO( 0,  0,  0, 7),
-       SET_QP_INFO( 0,  0,  0, 0), /* for now sdest to 0 */
-       SET_QP_INFO( 0,  0,  0, 0), /* for now sdest to 0 */
+       SET_QP_INFO(1,  2,  1, 0),
+       SET_QP_INFO(3,  4,  2, 1),
+       SET_QP_INFO(5,  6,  3, 0),
+       SET_QP_INFO(7,  8,  4, 1),
+       SET_QP_INFO(9, 10,  5, 0),
+       SET_QP_INFO(11, 12,  6, 1),
+       SET_QP_INFO(13, 14,  7, 0),
+       SET_QP_INFO(15, 16,  8, 1),
+       SET_QP_INFO(17, 18,  9, 0),
+       SET_QP_INFO(19, 20, 10, 1),
 };
 #endif
 
+struct srio_liodn_id_table srio_liodn_tbl[] = {
+       SET_SRIO_LIODN_2(1, 199, 200),
+       SET_SRIO_LIODN_2(2, 201, 202),
+};
+int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
+
 struct liodn_id_table liodn_tbl[] = {
 #ifdef CONFIG_SYS_DPAA_QBMAN
        SET_QMAN_LIODN(31),
@@ -56,10 +46,10 @@ struct liodn_id_table liodn_tbl[] = {
        SET_SATA_LIODN(1, 127),
        SET_SATA_LIODN(2, 128),
 
-       SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
-       SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
-       SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
-       SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
+       SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
+       SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
+       SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
+       SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 196),
 
        SET_DMA_LIODN(1, 197),
        SET_DMA_LIODN(2, 198),
@@ -107,6 +97,17 @@ struct liodn_id_table raide_liodn_tbl[] = {
 int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);
 #endif
 
+#ifdef CONFIG_SYS_DPAA_RMAN
+struct liodn_id_table rman_liodn_tbl[] = {
+       /* Set RMan block 0-3 liodn offset */
+       SET_RMAN_LIODN(0, 6),
+       SET_RMAN_LIODN(1, 7),
+       SET_RMAN_LIODN(2, 8),
+       SET_RMAN_LIODN(3, 9),
+};
+int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
+#endif
+
 struct liodn_id_table liodn_bases[] = {
        [FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(64, 100),
 #ifdef CONFIG_SYS_DPAA_FMAN
@@ -118,4 +119,7 @@ struct liodn_id_table liodn_bases[] = {
 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
        [FSL_HW_PORTAL_RAID_ENGINE]  = SET_LIODN_BASE_1(47),
 #endif
+#ifdef CONFIG_SYS_DPAA_RMAN
+       [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80),
+#endif
 };