/*
- * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007-2011 Freescale Semiconductor, Inc.
* Copyright (C) 2003 Motorola,Inc.
*
* See file CREDITS for list of people who contributed to this
#endif
GOT_ENTRY(__init_end)
- GOT_ENTRY(_end)
+ GOT_ENTRY(__bss_end__)
GOT_ENTRY(__bss_start)
END_GOT
lis r4,0
ori r4,r4,L1CSR0_DCE
andc r3,r3,r4
- mtspr L1CSR0,r0
+ mtspr L1CSR0,r3
isync
blr
lwzux r0,r4,r11
cmpwi r0,0
add r0,r0,r11
- stw r10,0(r3)
+ stw r4,0(r3)
beq- 5f
stw r0,0(r4)
5: bdnz 3b
* Now clear BSS segment
*/
lwz r3,GOT(__bss_start)
- lwz r4,GOT(_end)
+ lwz r4,GOT(__bss_end__)
cmplw 0,r3,r4
beq 6f