fsl/usb: Workaround for USB erratum-A007075

[u-boot] / arch / powerpc / cpu / mpc85xx / start.S

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 6b0380f9f51e4eb8a0c3fc6afcd3970d972b03ba..9a7881f6c0710eb74b183c8043a127f1fe717b26 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -122,7 +122,8 @@ _start_e500:
 #endif
 
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+       !defined(CONFIG_E6500)
        /* ISBC uses L2 as stack.
         * Disable L2 cache here so that u-boot can enable it later
         * as part of it's normal flow
@@ -467,7 +468,8 @@ nexti:      mflr    r1              /* R1 = our PC */
 2:     cmpw    r3, r4
        blt     1b
 
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \
+       !defined(CONFIG_SECURE_BOOT)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -488,12 +490,6 @@ nexti:     mflr    r1              /* R1 = our PC */
                0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 
-#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
-       create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
-               0, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
-               0, r6
 #else
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address