Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[u-boot] / arch / powerpc / cpu / mpc85xx / start.S

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 691bd3a44595b1e282b6f698b7d3639c04e9e931..d8c9fb6b2875c7d514bdca389066fb3a8aa6a7b5 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -26,6 +26,8 @@
 #undef MSR_KERNEL
 #define MSR_KERNEL ( MSR_ME )  /* Machine Check */
 
+#define LAW_EN         0x80000000
+
 #if defined(CONFIG_NAND_SPL) || \
        (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
 #define MINIMAL_SPL
@@ -78,6 +80,13 @@ _start_e500:
        li      r1,MSR_DE
        mtmsr   r1
 
+       /*
+        * If we got an ePAPR device tree pointer passed in as r3, we need that
+        * later in cpu_init_early_f(). Save it to a safe register before we
+        * clobber it so that we can fetch it from there later.
+        */
+       mr      r24, r3
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_A004510
        mfspr   r3,SPRN_SVR
        rlwinm  r3,r3,0,0xff
@@ -115,7 +124,8 @@ _start_e500:
 #endif
 
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+       !defined(CONFIG_E6500)
        /* ISBC uses L2 as stack.
         * Disable L2 cache here so that u-boot can enable it later
         * as part of it's normal flow
@@ -304,7 +314,7 @@ l2_disabled:
 #endif
        mtspr   HID0,r0
 
-#ifndef CONFIG_E500MC
+#if !defined(CONFIG_E500MC) && !defined(CONFIG_QEMU_E500)
        li      r0,(HID1_ASTME|HID1_ABE)@l      /* Addr streaming & broadcast */
        mfspr   r3,PVR
        andi.   r3,r3, 0xff
@@ -460,7 +470,8 @@ nexti:      mflr    r1              /* R1 = our PC */
 2:     cmpw    r3, r4
        blt     1b
 
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \
+       !defined(CONFIG_SECURE_BOOT)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -481,12 +492,6 @@ nexti:     mflr    r1              /* R1 = our PC */
                0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 
-#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
-       create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
-               0, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
-               0, r6
 #else
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
@@ -574,7 +579,6 @@ infinite_debug_loop:
 #ifdef CONFIG_FSL_CORENET
 
 #define CCSR_LAWBARH0  (CONFIG_SYS_CCSRBAR + 0x1000)
-#define LAW_EN         0x80000000
 #define LAW_SIZE_4K    0xb
 #define CCSRBAR_LAWAR  (LAW_EN | (0x1e << 20) | LAW_SIZE_4K)
 #define CCSRAR_C       0x80000000      /* Commit */
@@ -1142,6 +1146,10 @@ _start_cont:
        mr      r1,r3           /* Transfer to SP(r1) */
 
        GET_GOT
+
+       /* Pass our potential ePAPR device tree pointer to cpu_init_early_f */
+       mr      r3, r24
+
        bl      cpu_init_early_f
 
        /* switch back to AS = 0 */
@@ -1150,7 +1158,7 @@ _start_cont:
        mtmsr   r3
        isync
 
-       bl      cpu_init_f
+       bl      cpu_init_f      /* return boot_flag for calling board_init_f */
        bl      board_init_f
        isync
 
@@ -1644,6 +1652,7 @@ relocate_code:
        mr      r10,r5          /* Save copy of Destination Address     */
 
        GET_GOT
+#ifndef CONFIG_SPL_SKIP_RELOCATE
        mr      r3,r5                           /* Destination Address  */
        lis     r4,CONFIG_SYS_MONITOR_BASE@h            /* Source      Address  */
        ori     r4,r4,CONFIG_SYS_MONITOR_BASE@l
@@ -1734,6 +1743,7 @@ relocate_code:
 
        mtlr    r0
        blr                             /* NEVER RETURNS! */
+#endif
        .globl  in_ram
 in_ram: