Fix GCC format-security errors and convert sprintfs.

[u-boot] / arch / powerpc / cpu / mpc8xx / fec.c

diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index ccb460ef96a8546661fd561b76fb4d8c0283c684..ea4ab3a04237837b4cb76480be9f79782e8d0e9c 100644 (file)
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -148,7 +148,7 @@ int fec_initialize(bd_t *bis)
                /* for FEC1 make sure that the name of the interface is the same
                   as the old one for compatibility reasons */
                if (i == 0) {
-                       sprintf (dev->name, "FEC");
+                       strcpy(dev->name, "FEC");
                } else {
                        sprintf (dev->name, "FEC%d",
                                ether_fcc_info[i].ether_index + 1);
@@ -205,11 +205,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
 
        j = 0;
        while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
-#if defined(CONFIG_ICU862)
-               udelay(10);
-#else
                udelay(1);
-#endif
                j++;
        }
        if (j>=TOUT_LOOP) {
@@ -251,21 +247,21 @@ static int fec_recv (struct eth_device *dev)
                                rtx->rxbd[rxIdx].cbd_sc);
 #endif
                } else {
-                       uchar *rx = NetRxPackets[rxIdx];
+                       uchar *rx = net_rx_packets[rxIdx];
 
                        length -= 4;
 
 #if defined(CONFIG_CMD_CDP)
-                       if ((rx[0] & 1) != 0
-                           && memcmp ((uchar *) rx, NetBcastAddr, 6) != 0
-                           && !is_cdp_packet((uchar *)rx))
+                       if ((rx[0] & 1) != 0 &&
+                           memcmp((uchar *)rx, net_bcast_ethaddr, 6) != 0 &&
+                           !is_cdp_packet((uchar *)rx))
                                rx = NULL;
 #endif
                        /*
                         * Pass the packet up to the protocol layers.
                         */
                        if (rx != NULL)
-                               NetReceive (rx, length);
+                               net_process_received_packet(rx, length);
                }
 
                /* Give the buffer back to the FEC. */
@@ -424,7 +420,7 @@ static void fec_pin_init(int fecidx)
 
 #endif /* !CONFIG_RMII */
 
-#elif !defined(CONFIG_ICU862)
+#else
                /*
                 * Configure all of port D for MII.
                 */
@@ -437,42 +433,8 @@ static void fec_pin_init(int fecidx)
                        immr->im_ioport.iop_pddir = 0x1c58;     /* Pre rev. D */
                else
                        immr->im_ioport.iop_pddir = 0x1fff;     /* Rev. D and later */
-#else
-               /*
-                * Configure port A for MII.
-                */
-
-#if defined(CONFIG_ICU862) && defined(CONFIG_SYS_DISCOVER_PHY)
-
-               /*
-                * On the ICU862 board the MII-MDC pin is routed to PD8 pin
-                * * of CPU, so for this board we need to configure Utopia and
-                * * enable PD8 to MII-MDC function
-                */
-               immr->im_ioport.iop_pdpar |= 0x4080;
 #endif
 
-               /*
-                * Has Utopia been configured?
-                */
-               if (immr->im_ioport.iop_pdpar & (0x8000 >> 1)) {
-                       /*
-                        * YES - Use MUXED mode for UTOPIA bus.
-                        * This frees Port A for use by MII (see 862UM table 41-6).
-                        */
-                       immr->im_ioport.utmode &= ~0x80;
-               } else {
-                       /*
-                        * NO - set SPLIT mode for UTOPIA bus.
-                        *
-                        * This doesn't really effect UTOPIA (which isn't
-                        * enabled anyway) but just tells the 862
-                        * to use port A for MII (see 862UM table 41-6).
-                        */
-                       immr->im_ioport.utmode |= 0x80;
-               }
-#endif                         /* !defined(CONFIG_ICU862) */
-
 #endif /* CONFIG_ETHER_ON_FEC1 */
        } else if (fecidx == 1) {
 
@@ -542,32 +504,6 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
                (volatile fec_t *) (CONFIG_SYS_IMMR + efis->fecp_offset);
        int i;
 
-       if (efis->ether_index == 0) {
-#if defined(CONFIG_FADS)       /* FADS family uses FPGA (BCSR) to control PHYs */
-#if defined(CONFIG_MPC885ADS)
-               *(vu_char *) BCSR5 &= ~(BCSR5_MII1_EN | BCSR5_MII1_RST);
-#else
-               /* configure FADS for fast (FEC) ethernet, half-duplex */
-               /* The LXT970 needs about 50ms to recover from reset, so
-                * wait for it by discovering the PHY before leaving eth_init().
-                */
-               {
-                       volatile uint *bcsr4 = (volatile uint *) BCSR4;
-
-                       *bcsr4 = (*bcsr4 & ~(BCSR4_FETH_EN | BCSR4_FETHCFG1))
-                               | (BCSR4_FETHCFG0 | BCSR4_FETHFDE |
-                                  BCSR4_FETHRST);
-
-                       /* reset the LXT970 PHY */
-                       *bcsr4 &= ~BCSR4_FETHRST;
-                       udelay (10);
-                       *bcsr4 |= BCSR4_FETHRST;
-                       udelay (10);
-               }
-#endif /* CONFIG_MPC885ADS */
-#endif /* CONFIG_FADS */
-       }
-
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
        /* the MII interface is connected to FEC1
         * so for the miiphy_xxx function to work we must
@@ -640,7 +576,7 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
        for (i = 0; i < PKTBUFSRX; i++) {
                rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
                rtx->rxbd[i].cbd_datlen = 0;    /* Reset */
-               rtx->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
+               rtx->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i];
        }
        rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;