Merge branch 'master' of git://git.denx.de/u-boot-i2c

[u-boot] / arch / powerpc / cpu / mpc8xx / speed.c

diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 091b49f24a9f628abaf95ef6b3a0cb8d7ca4eda5..e2295d253f97dbbab203c4875784f5f08a4d1fd5 100644 (file)
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -253,18 +237,61 @@ int get_clocks (void)
 
 static long init_pll_866 (long clk);
 
+/* Adjust sdram refresh rate to actual CPU clock.
+ */
+static int sdram_adjust_866(void)
+{
+       volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+       long              mamr;
+
+       mamr = immr->im_memctl.memc_mamr;
+       mamr &= ~MAMR_PTA_MSK;
+       mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
+       immr->im_memctl.memc_mamr = mamr;
+
+       return 0;
+}
+
+/*
+ * Adjust sdram refresh rate to actual CPU clock
+ * and set timebase source according to actual CPU clock
+ */
+static int adjust_sdram_tbs_8xx(void)
+{
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) && \
+               !defined(CONFIG_TQM885D)
+       volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+       long              mamr;
+       long              sccr;
+
+       mamr = immr->im_memctl.memc_mamr;
+       mamr &= ~MAMR_PTA_MSK;
+       mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
+       immr->im_memctl.memc_mamr = mamr;
+
+       if (gd->cpu_clk < 67000000) {
+               sccr = immr->im_clkrst.car_sccr;
+               sccr |= SCCR_TBS;
+               immr->im_clkrst.car_sccr = sccr;
+       }
+#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
+
+       return 0;
+}
+
 /* This function sets up PLL (init_pll_866() is called) and
  * fills gd->cpu_clk and gd->bus_clk according to the environment
  * variable 'cpuclk' or to CONFIG_8xx_CPUCLK_DEFAULT (if 'cpuclk'
  * contains invalid value).
  * This functions requires an MPC866 or newer series CPU.
  */
-int get_clocks_866 (void)
+int get_clocks(void)
 {
        volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
        char              tmp[64];
        long              cpuclk = 0;
        long              sccr_reg;
+       int ret;
 
        if (getenv_f("cpuclk", tmp, sizeof (tmp)) > 0)
                cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
@@ -294,22 +321,11 @@ int get_clocks_866 (void)
        }
        immr->im_clkrst.car_sccr = sccr_reg;
 
-       return (0);
-}
+       ret = sdram_adjust_866();
+       if (ret)
+               return ret;
 
-/* Adjust sdram refresh rate to actual CPU clock.
- */
-int sdram_adjust_866 (void)
-{
-       volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-       long              mamr;
-
-       mamr = immr->im_memctl.memc_mamr;
-       mamr &= ~MAMR_PTA_MSK;
-       mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
-       immr->im_memctl.memc_mamr = mamr;
-
-       return (0);
+       return adjust_sdram_tbs_8xx();
 }
 
 /* Configure PLL for MPC866/859/885 CPU series
@@ -385,32 +401,3 @@ static long init_pll_866 (long clk)
 }
 
 #endif /* CONFIG_8xx_CPUCLK_DEFAULT */
-
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
-    && !defined(CONFIG_TQM885D)
-/*
- * Adjust sdram refresh rate to actual CPU clock
- * and set timebase source according to actual CPU clock
- */
-int adjust_sdram_tbs_8xx (void)
-{
-       volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-       long              mamr;
-       long              sccr;
-
-       mamr = immr->im_memctl.memc_mamr;
-       mamr &= ~MAMR_PTA_MSK;
-       mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
-       immr->im_memctl.memc_mamr = mamr;
-
-       if (gd->cpu_clk < 67000000) {
-               sccr = immr->im_clkrst.car_sccr;
-               sccr |= SCCR_TBS;
-               immr->im_clkrst.car_sccr = sccr;
-       }
-
-       return (0);
-}
-#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
-
-/* ------------------------------------------------------------------------- */