powerpc, 8xx: Add support for MCR3000 board from CSSI

[u-boot] / arch / powerpc / cpu / mpc8xx / start.S

diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 4a8c5d9e48b00ced9c64bb6459cfc9b2f18e76ae..b00696fc75dcae47eef34db123b1e95344a3d91f 100644 (file)
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -3,23 +3,7 @@
  *  Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
  *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*  U-Boot - Startup Code for PowerPC based Embedded Boards
@@ -37,14 +21,11 @@
  *  board_init will change CS0 to be positioned at the correct
  *  address and (s)dram will be positioned at address 0
  */
+#include <asm-offsets.h>
 #include <config.h>
 #include <mpc8xx.h>
-#include <timestamp.h>
 #include <version.h>
 
-#define CONFIG_8xx 1           /* needed for Linux kernel header files */
-#define _LINUX_CONFIG_H 1      /* avoid reading Linux autoconf.h file  */
-
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
 
@@ -52,10 +33,6 @@
 #include <asm/mmu.h>
 #include <asm/u-boot.h>
 
-#ifndef  CONFIG_IDENT_STRING
-#define  CONFIG_IDENT_STRING ""
-#endif
-
 /* We don't want the  MMU yet.
 */
 #undef MSR_KERNEL
@@ -76,7 +53,7 @@
        GOT_ENTRY(transfer_to_handler)
 
        GOT_ENTRY(__init_end)
-       GOT_ENTRY(_end)
+       GOT_ENTRY(__bss_end)
        GOT_ENTRY(__bss_start)
        END_GOT
 
@@ -88,9 +65,7 @@
        .long   0x27051956              /* U-Boot Magic Number                  */
        .globl  version_string
 version_string:
-       .ascii U_BOOT_VERSION
-       .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
-       .ascii CONFIG_IDENT_STRING, "\0"
+       .ascii U_BOOT_VERSION_STRING, "\0"
 
        . = EXC_OFF_SYS_RESET
        .globl  _start
@@ -131,12 +106,7 @@ _start:
        lis     r3, IDC_DISABLE@h       /* Disable data cache */
        mtspr   DC_CST, r3
 
-#if !defined(CONFIG_SYS_DELAYED_ICACHE)
-                                       /* On IP860 and PCU E,
-                                        * we cannot enable IC yet
-                                        */
        lis     r3, IDC_ENABLE@h        /* Enable instruction cache */
-#endif
        mtspr   IC_CST, r3
 
        /* invalidate all tlb's                                                 */
@@ -361,20 +331,11 @@ icache_status:
 
        .globl  dcache_enable
 dcache_enable:
-#if 0
-       SYNC
-#endif
-#if 1
        lis     r3, 0x0400              /* Set cache mode with MMU off */
        mtspr   MD_CTR, r3
-#endif
 
        lis     r3, IDC_INVALL@h
        mtspr   DC_CST, r3
-#if 0
-       lis     r3, DC_SFWT@h
-       mtspr   DC_CST, r3
-#endif
        lis     r3, IDC_ENABLE@h
        mtspr   DC_CST, r3
        blr
@@ -586,7 +547,7 @@ in_ram:
        lwzux   r0,r4,r11
        cmpwi   r0,0
        add     r0,r0,r11
-       stw     r10,0(r3)
+       stw     r4,0(r3)
        beq-    5f
        stw     r0,0(r4)
 5:     bdnz    3b
@@ -596,7 +557,7 @@ clear_bss:
         * Now clear BSS segment
         */
        lwz     r3,GOT(__bss_start)
-       lwz     r4,GOT(_end)
+       lwz     r4,GOT(__bss_end)
 
        cmplw   0, r3, r4
        beq     6f