8xxx: Change all 8*xx_DDR addresses to 8xxx

[u-boot] / arch / powerpc / cpu / mpc8xxx / cpu.c

diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 1c615d0b55c45e6f1095a0345d1b822b739ce12d..e8613be39310ced159744d8115ac2f198c791742 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct cpu_type cpu_type_list [] = {
+static struct cpu_type cpu_type_list[] = {
 #if defined(CONFIG_MPC85xx)
        CPU_TYPE_ENTRY(8533, 8533, 1),
        CPU_TYPE_ENTRY(8535, 8535, 1),
@@ -69,11 +69,21 @@ struct cpu_type cpu_type_list [] = {
        CPU_TYPE_ENTRY(P2040, P2040, 4),
        CPU_TYPE_ENTRY(P2041, P2041, 4),
        CPU_TYPE_ENTRY(P3041, P3041, 4),
-       CPU_TYPE_ENTRY_MASK(P3060, P3060, 6, 0xf3),
        CPU_TYPE_ENTRY(P4040, P4040, 4),
        CPU_TYPE_ENTRY(P4080, P4080, 8),
        CPU_TYPE_ENTRY(P5010, P5010, 1),
        CPU_TYPE_ENTRY(P5020, P5020, 2),
+       CPU_TYPE_ENTRY(P5021, P5021, 2),
+       CPU_TYPE_ENTRY(P5040, P5040, 4),
+       CPU_TYPE_ENTRY(T4240, T4240, 0),
+       CPU_TYPE_ENTRY(T4120, T4120, 0),
+       CPU_TYPE_ENTRY(B4860, B4860, 0),
+       CPU_TYPE_ENTRY(G4860, G4860, 0),
+       CPU_TYPE_ENTRY(G4060, G4060, 0),
+       CPU_TYPE_ENTRY(B4440, B4440, 0),
+       CPU_TYPE_ENTRY(G4440, G4440, 0),
+       CPU_TYPE_ENTRY(B4420, B4420, 0),
+       CPU_TYPE_ENTRY(B4220, B4220, 0),
        CPU_TYPE_ENTRY(BSC9130, 9130, 1),
        CPU_TYPE_ENTRY(BSC9131, 9131, 1),
 #elif defined(CONFIG_MPC86xx)
@@ -83,7 +93,39 @@ struct cpu_type cpu_type_list [] = {
 #endif
 };
 
-struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1);
+#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+u32 compute_ppc_cpumask(void)
+{
+       ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+       int i = 0, count = 0;
+       u32 cluster, mask = 0;
+
+       do {
+               int j;
+               cluster = in_be32(&gur->tp_cluster[i++].lower);
+               for (j = 0; j < 4; j++) {
+                       u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK;
+                       u32 type = in_be32(&gur->tp_ityp[idx]);
+
+                       if (type & TP_ITYP_AV) {
+                               if (TP_ITYP_TYPE(type) == TP_ITYP_TYPE_PPC)
+                                       mask |= 1 << count;
+                       }
+                       count++;
+               }
+       } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC);
+
+       return mask;
+}
+#else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
+/*
+ * Before chassis genenration 2, the cpumask should be hard-coded.
+ * In case of cpu type unknown or cpumask unset, use 1 as fail save.
+ */
+#define compute_ppc_cpumask()  1
+#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
+
+static struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);
 
 struct cpu_type *identify_cpu(u32 ver)
 {
@@ -101,7 +143,7 @@ struct cpu_type *identify_cpu(u32 ver)
 /*
  * Return a 32-bit mask indicating which cores are present on this SOC.
  */
-u32 cpu_mask()
+u32 cpu_mask(void)
 {
        ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
        struct cpu_type *cpu = gd->cpu;
@@ -111,20 +153,25 @@ u32 cpu_mask()
        return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
                        MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
 
+       if (cpu->num_cores == 0)
+               return compute_ppc_cpumask();
+
        return cpu->mask;
 }
 
 /*
  * Return the number of cores on this SOC.
  */
-int cpu_numcores() {
-       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
+int cpu_numcores(void)
+{
        struct cpu_type *cpu = gd->cpu;
 
-       /* better to query feature reporting register than just assume 1 */
-       if (cpu == &cpu_type_unknown)
-               return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
-                       MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
+       /*
+        * Report # of cores in terms of the cpu_mask if we haven't
+        * figured out how many there are yet
+        */
+       if (cpu->num_cores == 0)
+               return hweight32(cpu_mask());
 
        return cpu->num_cores;
 }
@@ -136,9 +183,7 @@ int cpu_numcores() {
  */
 int is_core_valid(unsigned int core)
 {
-       struct cpu_type *cpu = gd->cpu;
-
-       return !!((1 << core) & cpu->mask);
+       return !!((1 << core) & cpu_mask());
 }
 
 int probecpu (void)
@@ -154,6 +199,19 @@ int probecpu (void)
        return 0;
 }
 
+/* Once in memory, compute mask & # cores once and save them off */
+int fixup_cpu(void)
+{
+       struct cpu_type *cpu = gd->cpu;
+
+       if (cpu->num_cores == 0) {
+               cpu->mask = cpu_mask();
+               cpu->num_cores = cpu_numcores();
+       }
+
+       return 0;
+}
+
 /*
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()