]> git.sur5r.net Git - u-boot/blobdiff - arch/powerpc/cpu/mpc8xxx/ddr/Makefile
Merge branch 'u-boot/master' into u-boot-arm/master
[u-boot] / arch / powerpc / cpu / mpc8xxx / ddr / Makefile
index cb7f856554c6901968cefb8d81da374c0cffe4fb..29523aa9139b8d55c74cd2df4635994af7a99197 100644 (file)
@@ -1,5 +1,5 @@
 #
-# Copyright 2008 Freescale Semiconductor, Inc.
+# Copyright 2008-2011 Freescale Semiconductor, Inc.
 #
 # This program is free software; you can redistribute it and/or
 # modify it under the terms of the GNU General Public License
@@ -8,19 +8,29 @@
 
 include $(TOPDIR)/config.mk
 
-LIB    = $(obj)libddr.a
+LIB    = $(obj)libddr.o
 
 COBJS-$(CONFIG_FSL_DDR1)       += main.o util.o ctrl_regs.o options.o \
                                   lc_common_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR1)       += ddr1_dimm_params.o
 
 COBJS-$(CONFIG_FSL_DDR2)       += main.o util.o ctrl_regs.o options.o \
                                   lc_common_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR2)       += ddr2_dimm_params.o
 
 COBJS-$(CONFIG_FSL_DDR3)       += main.o util.o ctrl_regs.o options.o \
                                   lc_common_dimm_params.o
+ifdef CONFIG_DDR_SPD
+SPD := y
+endif
+ifdef CONFIG_SPD_EEPROM
+SPD := y
+endif
+ifdef SPD
+COBJS-$(CONFIG_FSL_DDR1)       += ddr1_dimm_params.o
+COBJS-$(CONFIG_FSL_DDR2)       += ddr2_dimm_params.o
 COBJS-$(CONFIG_FSL_DDR3)       += ddr3_dimm_params.o
+endif
+
+COBJS-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
 
 SRCS   := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
@@ -28,7 +38,7 @@ OBJS  := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
 all:   $(obj).depend $(LIB)
 
 $(LIB):        $(OBJS)
-       $(AR) $(ARFLAGS) $@ $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
 
 include $(SRCTREE)/rules.mk