Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / arch / powerpc / cpu / ppc4xx / 4xx_ibm_ddr2_autocalib.c

diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index 4b8e65a51de8ec1f5b878279b65d91a0366a90eb..82823147fe9d4aab07eaaf0605ca739a5341f874 100644 (file)
--- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -14,24 +14,7 @@
  *
  * COPYRIGHT   AMCC   CORPORATION 2004
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /* define DEBUG for debugging output (obviously ;-)) */
@@ -154,18 +137,20 @@ u32 ddr_rdss_opt(ulong) __attribute__((weak, alias("__ddr_rdss_opt")));
 
 static u32 *get_membase(int bxcr_num)
 {
-       ulong bxcf;
        u32 *membase;
 
 #if defined(SDRAM_R0BAS)
        /* BAS from Memory Queue rank reg. */
        membase =
            (u32 *)(SDRAM_RXBAS_SDBA_DECODE(mfdcr_any(SDRAM_R0BAS+bxcr_num)));
-       bxcf = 0;       /* just to satisfy the compiler */
 #else
-       /* BAS from SDRAM_MBxCF mem rank reg. */
-       mfsdram(SDRAM_MB0CF + (bxcr_num<<2), bxcf);
-       membase = (u32 *)((bxcf & 0xfff80000) << 3);
+       {
+               ulong bxcf;
+
+               /* BAS from SDRAM_MBxCF mem rank reg. */
+               mfsdram(SDRAM_MB0CF + (bxcr_num<<2), bxcf);
+               membase = (u32 *)((bxcf & 0xfff80000) << 3);
+       }
 #endif
 
        return membase;
@@ -719,7 +704,9 @@ static u32 program_DQS_calibration_methodB(struct ddrautocal *ddrcal)
 static u32 DQS_calibration_methodB(struct ddrautocal *cal)
 {
        ulong rfdc_reg;
+#ifndef CONFIG_DDR_RFDC_FIXED
        ulong rffd;
+#endif
 
        ulong rqdc_reg;
        ulong rqfd;
@@ -837,7 +824,6 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal)
        mtsdram(SDRAM_RFDC, rfdc_reg | SDRAM_RFDC_RFFD_ENCODE(rffd_average));
 #endif /* CONFIG_DDR_RFDC_FIXED */
 
-       rffd = rffd_average;
        in_window = 0;
 
        curr_win_min = curr_win_max = 0;