powerpc/mp: add support for discontiguous cores

[u-boot] / arch / powerpc / include / asm / fsl_serdes.h

diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 6da4b6ff942ddf7167f08b9dce70829bcaac8910..0f31af1db320e8d9272eaefd8dbf9446a8b546a2 100644 (file)
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -1,21 +1,63 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
 #ifndef __FSL_SERDES_H
 #define __FSL_SERDES_H
 
 #include <config.h>
 
-#define FSL_SERDES_CLK_100             (0 << 28)
-#define FSL_SERDES_CLK_125             (1 << 28)
-#define FSL_SERDES_CLK_150             (3 << 28)
-#define FSL_SERDES_PROTO_SATA          0
-#define FSL_SERDES_PROTO_PEX           1
-#define FSL_SERDES_PROTO_PEX_X2                2
-#define FSL_SERDES_PROTO_SGMII         3
-#define FSL_SERDES_VDD_1V              1
+enum srds_prtcl {
+       NONE = 0,
+       PCIE1,
+       PCIE2,
+       PCIE3,
+       PCIE4,
+       SATA1,
+       SATA2,
+       SRIO1,
+       SRIO2,
+       SGMII_FM1_DTSEC1,
+       SGMII_FM1_DTSEC2,
+       SGMII_FM1_DTSEC3,
+       SGMII_FM1_DTSEC4,
+       SGMII_FM1_DTSEC5,
+       SGMII_FM2_DTSEC1,
+       SGMII_FM2_DTSEC2,
+       SGMII_FM2_DTSEC3,
+       SGMII_FM2_DTSEC4,
+       SGMII_TSEC1,
+       SGMII_TSEC2,
+       SGMII_TSEC3,
+       SGMII_TSEC4,
+       XAUI_FM1,
+       XAUI_FM2,
+       AURORA,
+};
+
+int is_serdes_configured(enum srds_prtcl device);
+void fsl_serdes_init(void);
 
-#ifdef CONFIG_FSL_SERDES
-extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
-#else
-static void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) {}
-#endif /* CONFIG_FSL_SERDES */
+#ifdef CONFIG_FSL_CORENET
+int serdes_get_first_lane(enum srds_prtcl device);
+#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
+void serdes_reset_rx(enum srds_prtcl device);
+#endif
+#endif
 
 #endif /* __FSL_SERDES_H */