u32 ddr_time_config2; /* Timing Configuration Register */
} ddr512x_config_t;
+typedef struct sdram_conf_s {
+ unsigned long size;
+ ddr512x_config_t cfg;
+} sdram_conf_t;
+
/*
* DMA/Messaging Unit
*/
u8 reserved[0x0cfc]; /* fill to 4096 bytes size */
} ioctrl512x_t;
-/* Indexes in regs array */
-/* Set for DDR */
-#define IOCTRL_MUX_DDR 0x00000036
-
/* IO pin fields */
#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */
#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */
}
#endif /* __ASSEMBLY__ */
+#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
+#define CONFIG_SYS_MPC512x_USB_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
+
#endif /* __IMMAP_512x__ */