powerpc: T2080, T2081: Remove macro CONFIG_PPC_T2080 and CONFIG_PPC_T2081

[u-boot] / arch / powerpc / include / asm / immap_85xx.h

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index b8b5379613d4ac7bea2c47a21f3b377dca1cce15..783db18b8a725b590dc334463bd51e952daeec09 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1770,13 +1770,13 @@ typedef struct ccsr_gur {
 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL                0x000000f8
 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT  3
 #define FSL_CORENET_RCWSR6_BOOT_LOC    0x0f800000
-#elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420)
+#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL        0xfe000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  25
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL        0x00ff0000
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT  16
 #define FSL_CORENET_RCWSR6_BOOT_LOC    0x0f800000
-#elif defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042) ||\
+#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
 defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL        0xff000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  24
@@ -1797,7 +1797,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define PXCKEN_MASK    0x80000000
 #define PXCK_MASK      0x00FF0000
 #define PXCK_BITS_START        16
-#elif defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023) || \
+#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) || \
        defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL                0xff800000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  23
@@ -1812,7 +1812,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define PXCKEN_MASK                            0x80000000
 #define PXCK_MASK                              0x00FF0000
 #define PXCK_BITS_START                                16
-#elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
+#elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL                0xff000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  24
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL                0x00ff0000
@@ -1885,7 +1885,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC6_RGMII       0x08000000
 #define FSL_CORENET_RCWSR13_EC2_FM1_GPIO               0x10000000
 #endif
-#if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
+#if defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 #define FSL_CORENET_RCWSR13_EC1                        0x60000000 /* bits 417..418 */
 #define FSL_CORENET_RCWSR13_EC1_DTSEC3_RGMII   0x00000000
 #define FSL_CORENET_RCWSR13_EC1_GPIO           0x40000000
@@ -2883,8 +2883,8 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_TDM_OFFSET          0x185000
 #define CONFIG_SYS_MPC85xx_QE_OFFSET           0x140000
 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET     0x1e0000
-#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
-       && !defined(CONFIG_PPC_B4420)
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_ARCH_B4860) && \
+       !defined(CONFIG_ARCH_B4420)
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET                0x240000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET                0x250000
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET                0x260000