]> git.sur5r.net Git - u-boot/blobdiff - arch/powerpc/include/asm/immap_86xx.h
powerpc/8xxx: Enabled address hashing for 85xx
[u-boot] / arch / powerpc / include / asm / immap_86xx.h
index b9e02dbc792e6e4e15a3adbda0dad054c7bc29e2..4bebb685658363139cd7248f1939d2d9322f9926 100644 (file)
@@ -1257,6 +1257,23 @@ extern immap_t  *immr;
 #define CONFIG_SYS_MPC86xx_DMA_OFFSET  (0x21000)
 #define CONFIG_SYS_MPC86xx_DMA_ADDR    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
 
+#define CONFIG_SYS_MPC86xx_PCI1_OFFSET         0x8000
+#ifdef CONFIG_MPC8610
+#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET         0xa000
+#else
+#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET         0x8000
+#endif
+#define CONFIG_SYS_MPC86xx_PCIE2_OFFSET         0x9000
+
+#define CONFIG_SYS_PCI1_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCI1_OFFSET)
+#define CONFIG_SYS_PCI2_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCI2_OFFSET)
+#define CONFIG_SYS_PCIE1_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCIE1_OFFSET)
+#define CONFIG_SYS_PCIE2_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCIE2_OFFSET)
+
 #define CONFIG_SYS_TSEC1_OFFSET                0x24000
 #define CONFIG_SYS_MDIO1_OFFSET                0x24000
 #define CONFIG_SYS_LBC_ADDR            (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)