Merge branch 'master' of git://git.denx.de/u-boot-arm

[u-boot] / arch / powerpc / lib / board.c

diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index ebf400851a446f97ac61638403008c310deb08b2..12270a4533a3c79de111ce64941c2ccd379ffff1 100644 (file)
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -163,7 +163,7 @@ static int init_baudrate(void)
 
 /***********************************************************************/
 
-void __board_add_ram_info(int use_default)
+static void __board_add_ram_info(int use_default)
 {
        /* please define platform specific board_add_ram_info() */
 }
@@ -171,7 +171,7 @@ void __board_add_ram_info(int use_default)
 void board_add_ram_info(int)
        __attribute__ ((weak, alias("__board_add_ram_info")));
 
-int __board_flash_wp_on(void)
+static int __board_flash_wp_on(void)
 {
        /*
         * Most flashes can't be detected when write protection is enabled,
@@ -184,7 +184,7 @@ int __board_flash_wp_on(void)
 int board_flash_wp_on(void)
        __attribute__ ((weak, alias("__board_flash_wp_on")));
 
-void __cpu_secondary_init_r(void)
+static void __cpu_secondary_init_r(void)
 {
 }
 
@@ -262,7 +262,7 @@ static int init_func_watchdog_reset(void)
  * Initialization sequence
  */
 
-init_fnc_t *init_sequence[] = {
+static init_fnc_t *init_sequence[] = {
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
        probecpu,
 #endif
@@ -345,7 +345,7 @@ ulong get_effective_memsize(void)
 #endif
 }
 
-int __fixup_cpu(void)
+static int __fixup_cpu(void)
 {
        return 0;
 }
@@ -402,7 +402,7 @@ void board_init_f(ulong bootflag)
 
 #ifdef CONFIG_POST
        post_bootmode_init();
-       post_run(NULL, POST_ROM | post_bootmode_get(0));
+       post_run(NULL, POST_ROM | post_bootmode_get(NULL));
 #endif
 
        WATCHDOG_RESET();
@@ -556,11 +556,11 @@ void board_init_f(ulong bootflag)
 #endif
 #if defined(CONFIG_MPC8220)
        bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
-       bd->bi_inpfreq = gd->inp_clk;
+       bd->bi_inpfreq = gd->arch.inp_clk;
        bd->bi_pcifreq = gd->pci_clk;
-       bd->bi_vcofreq = gd->vco_clk;
-       bd->bi_pevfreq = gd->pev_clk;
-       bd->bi_flbfreq = gd->flb_clk;
+       bd->bi_vcofreq = gd->arch.vco_clk;
+       bd->bi_pevfreq = gd->arch.pev_clk;
+       bd->bi_flbfreq = gd->arch.flb_clk;
 
        /* store bootparam to sram (backward compatible), here? */
        {
@@ -568,10 +568,10 @@ void board_init_f(ulong bootflag)
 
                *sram++ = gd->ram_size;
                *sram++ = gd->bus_clk;
-               *sram++ = gd->inp_clk;
+               *sram++ = gd->arch.inp_clk;
                *sram++ = gd->cpu_clk;
-               *sram++ = gd->vco_clk;
-               *sram++ = gd->flb_clk;
+               *sram++ = gd->arch.vco_clk;
+               *sram++ = gd->arch.flb_clk;
                *sram++ = 0xb8c3ba11;   /* boot signature */
        }
 #endif
@@ -580,16 +580,16 @@ void board_init_f(ulong bootflag)
        bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
        bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 #if defined(CONFIG_CPM2)
-       bd->bi_cpmfreq = gd->cpm_clk;
-       bd->bi_brgfreq = gd->brg_clk;
-       bd->bi_sccfreq = gd->scc_clk;
-       bd->bi_vco = gd->vco_out;
+       bd->bi_cpmfreq = gd->arch.cpm_clk;
+       bd->bi_brgfreq = gd->arch.brg_clk;
+       bd->bi_sccfreq = gd->arch.scc_clk;
+       bd->bi_vco = gd->arch.vco_out;
 #endif /* CONFIG_CPM2 */
 #if defined(CONFIG_MPC512X)
-       bd->bi_ipsfreq = gd->ips_clk;
+       bd->bi_ipsfreq = gd->arch.ips_clk;
 #endif /* CONFIG_MPC512X */
 #if defined(CONFIG_MPC5xxx)
-       bd->bi_ipbfreq = gd->ipb_clk;
+       bd->bi_ipbfreq = gd->arch.ipb_clk;
        bd->bi_pcifreq = gd->pci_clk;
 #endif /* CONFIG_MPC5xxx */
        bd->bi_baudrate = gd->baudrate; /* Console Baudrate     */
@@ -649,10 +649,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
        /*
-        * The gd->cpu pointer is set to an address in flash before relocation.
-        * We need to update it to point to the same CPU entry in RAM.
+        * The gd->arch.cpu pointer is set to an address in flash before
+        * relocation.  We need to update it to point to the same CPU entry
+        * in RAM.
         */
-       gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+       gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
 
        /*
         * If we didn't know the cpu mask & # cores, we can save them of
@@ -739,16 +740,13 @@ void board_init_r(gd_t *id, ulong dest_addr)
                flash_size = 0;
        } else if ((flash_size = flash_init()) > 0) {
 #ifdef CONFIG_SYS_FLASH_CHECKSUM
-               char *s;
-
                print_size(flash_size, "");
                /*
                 * Compute and print flash CRC if flashchecksum is set to 'y'
                 *
                 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
                 */
-               s = getenv("flashchecksum");
-               if (s && (*s == 'y')) {
+               if (getenv_yesno("flashchecksum") == 1) {
                        printf("  CRC: %08X",
                               crc32(0,
                                     (const unsigned char *)
@@ -841,9 +839,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
         * "i2cfast" into account
         */
        {
-               char *s = getenv("i2cfast");
-
-               if (s && ((*s == 'y') || (*s == 'Y'))) {
+               if (getenv_yesno("i2cfast") == 1) {
                        bd->bi_iic_fast[0] = 1;
                        bd->bi_iic_fast[1] = 1;
                }