*/
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
+ memset(bd, 0, sizeof(bd_t));
gd->bd = bd;
debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
#ifdef CONFIG_SYS_SRAM_BASE
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */
-#else
- bd->bi_sramstart = 0;
- bd->bi_sramsize = 0;
#endif
#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
#endif
-#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
- * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
- * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
- * bridge there.
+ * Do early PCI configuration _before_ the flash gets initialised,
+ * because PCU ressources are crucial for flash access on some boards.
*/
pci_init ();
#endif
bd->bi_flashoffset = TEXT_BASE + flash_size;
# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
-# else
- bd->bi_flashoffset = 0;
# endif
-#else /* CONFIG_SYS_NO_FLASH */
-
- bd->bi_flashsize = 0;
- bd->bi_flashstart = 0;
- bd->bi_flashoffset = 0;
#endif /* !CONFIG_SYS_NO_FLASH */
WATCHDOG_RESET ();
if (s && ((*s == 'y') || (*s == 'Y'))) {
bd->bi_iic_fast[0] = 1;
bd->bi_iic_fast[1] = 1;
- } else {
- bd->bi_iic_fast[0] = 0;
- bd->bi_iic_fast[1] = 0;
}
}
-#else
- bd->bi_iic_fast[0] = 0;
- bd->bi_iic_fast[1] = 0;
#endif /* CONFIG_I2CFAST */
#endif /* CONFIG_405GP, CONFIG_405EP */
#endif /* CONFIG_SYS_EXTBDINFO */
WATCHDOG_RESET ();
-#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
+#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
* Do pci configuration
*/