Merge 'u-boot-atmel/master' into 'u-boot-arm/master'

[u-boot] / arch / sh / include / asm / cpu_sh7780.h

diff --git a/arch/sh/include/asm/cpu_sh7780.h b/arch/sh/include/asm/cpu_sh7780.h
index d4f824e715f6e64d3f5404dd342311ca53a8f741..162aa688f3cbc7ecc4c18736043b22b080e0fa55 100644 (file)
--- a/arch/sh/include/asm/cpu_sh7780.h
+++ b/arch/sh/include/asm/cpu_sh7780.h
@@ -272,29 +272,7 @@
 #define        MSTPCR  0xFFC80030
 
 /* Timer Unit */
-#define        TSTR    TSTR0
-#define        TOCR    0xFFD80000
-#define        TSTR0   0xFFD80004
-#define        TCOR0   0xFFD80008
-#define        TCNT0   0xFFD8000C
-#define        TCR0    0xFFD80010
-#define        TCOR1   0xFFD80014
-#define        TCNT1   0xFFD80018
-#define        TCR1    0xFFD8001C
-#define        TCOR2   0xFFD80020
-#define        TCNT2   0xFFD80024
-#define        TCR2    0xFFD80028
-#define        TCPR2   0xFFD8002C
-#define        TSTR1   0xFFDC0004
-#define        TCOR3   0xFFDC0008
-#define        TCNT3   0xFFDC000C
-#define        TCR3    0xFFDC0010
-#define        TCOR4   0xFFDC0014
-#define        TCNT4   0xFFDC0018
-#define        TCR4    0xFFDC001C
-#define        TCOR5   0xFFDC0020
-#define        TCNT5   0xFFDC0024
-#define        TCR5    0xFFDC0028
+#define TMU_BASE    0xFFD80000
 
 /* Timer/Counter */
 #define        CMTCFG  0xFFE30000
@@ -333,27 +311,8 @@
 #define        RYRAR   0xFFE80054
 
 /* Serial Communication        Interface with FIFO */
-#define        SCIF0_BASE SCSMR0
 #define        SCSMR0  0xFFE00000
-#define        SCBRR0  0xFFE00004
-#define        SCSCR0  0xFFE00008
-#define        SCFSR0  0xFFE00010
-#define        SCFCR0  0xFFE00018
-#define        SCTFDR0 0xFFE0001C
-#define        SCRFDR0 0xFFE00020
-#define        SCSPTR0 0xFFE00024
-#define        SCLSR0  0xFFE00028
-#define        SCRER0  0xFFE0002C
-#define        SCSMR1  0xFFE10000
-#define        SCBRR1  0xFFE10004
-#define        SCSCR1  0xFFE10008
-#define        SCFSR1  0xFFE10010
-#define        SCFCR1  0xFFE10018
-#define        SCTFDR1 0xFFE1001C
-#define        SCRFDR1 0xFFE10020
-#define        SCSPTR1 0xFFE10024
-#define        SCLSR1  0xFFE10028
-#define        SCRER1  0xFFE1002C
+#define        SCIF0_BASE SCSMR0
 
 /* Serial I/O with FIFO */
 #define        SIMDR   0xFFE20000