Merge branch 'master' of git://git.denx.de/u-boot-arm into master

[u-boot] / arch / sh / include / asm / cpu_sh7780.h

diff --git a/arch/sh/include/asm/cpu_sh7780.h b/arch/sh/include/asm/cpu_sh7780.h
index e9c59fe245a81549ba14c7bd3f8ca2e90171688d..8302ce1c6aeb3137d9484233eacaae3ceca65492 100644 (file)
--- a/arch/sh/include/asm/cpu_sh7780.h
+++ b/arch/sh/include/asm/cpu_sh7780.h
@@ -5,21 +5,7 @@
  * Copyright (c) 2007,2008 Nobuhiro Iwamatsu
  * Copyright (c) 2008 Yusuke Goda <goda.yusuke@renesas.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #define        CACHE_OC_NUM_WAYS       1
@@ -272,29 +258,7 @@
 #define        MSTPCR  0xFFC80030
 
 /* Timer Unit */
-#define        TSTR    TSTR0
-#define        TOCR    0xFFD80000
-#define        TSTR0   0xFFD80004
-#define        TCOR0   0xFFD80008
-#define        TCNT0   0xFFD8000C
-#define        TCR0    0xFFD80010
-#define        TCOR1   0xFFD80014
-#define        TCNT1   0xFFD80018
-#define        TCR1    0xFFD8001C
-#define        TCOR2   0xFFD80020
-#define        TCNT2   0xFFD80024
-#define        TCR2    0xFFD80028
-#define        TCPR2   0xFFD8002C
-#define        TSTR1   0xFFDC0004
-#define        TCOR3   0xFFDC0008
-#define        TCNT3   0xFFDC000C
-#define        TCR3    0xFFDC0010
-#define        TCOR4   0xFFDC0014
-#define        TCNT4   0xFFDC0018
-#define        TCR4    0xFFDC001C
-#define        TCOR5   0xFFDC0020
-#define        TCNT5   0xFFDC0024
-#define        TCR5    0xFFDC0028
+#define TMU_BASE    0xFFD80000
 
 /* Timer/Counter */
 #define        CMTCFG  0xFFE30000