config SYS_ARCH
default "x86"
+choice
+ prompt "Run U-Boot in 32/64-bit mode"
+ default X86_RUN_32BIT
+ help
+ U-Boot can be built as a 32-bit binary which runs in 32-bit mode
+ even on 64-bit machines. In this case SPL is not used, and U-Boot
+ runs directly from the reset vector (via 16-bit start-up).
+
+ Alternatively it can be run as a 64-bit binary, thus requiring a
+ 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
+ start-up) then jumps to U-Boot in 64-bit mode.
+
+ For now, 32-bit mode is recommended, as 64-bit is still
+ experimental and is missing a lot of features.
+
+config X86_RUN_32BIT
+ bool "32-bit"
+ help
+ Build U-Boot as a 32-bit binary with no SPL. This is the currently
+ supported normal setup. U-Boot will stay in 32-bit mode even on
+ 64-bit machines. When booting a 64-bit kernel, U-Boot will switch
+ to 64-bit just before starting the kernel. Only the bottom 4GB of
+ memory can be accessed through normal means, although
+ arch_phys_memset() can be used for basic access to other memory.
+
+config X86_RUN_64BIT
+ bool "64-bit"
+ select X86_64
+ select SUPPORT_SPL
+ select SPL
+ select SPL_SEPARATE_BSS
+ help
+ Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
+ experimental and many features are missing. U-Boot SPL starts up,
+ runs through the 16-bit and 32-bit init, then switches to 64-bit
+ mode and jumps to U-Boot proper.
+
+endchoice
+
+config X86_64
+ bool
+
+config SPL_X86_64
+ bool
+ depends on SPL
+
choice
prompt "Mainboard vendor"
default VENDOR_EMULATION
+config VENDOR_ADVANTECH
+ bool "advantech"
+
+config VENDOR_CONGATEC
+ bool "congatec"
+
config VENDOR_COREBOOT
bool "coreboot"
+config VENDOR_DFI
+ bool "dfi"
+
config VENDOR_EFI
bool "efi"
endchoice
# board-specific options below
+source "board/advantech/Kconfig"
+source "board/congatec/Kconfig"
source "board/coreboot/Kconfig"
+source "board/dfi/Kconfig"
source "board/efi/Kconfig"
source "board/emulation/Kconfig"
source "board/google/Kconfig"
# architecture-specific options below
+config AHCI
+ default y
+
config SYS_MALLOC_F_LEN
default 0x800
bool
default n
+# The following options control where the 16-bit and 32-bit init lies
+# If SPL is enabled then it normally holds this init code, and U-Boot proper
+# is normally a 64-bit build.
+#
+# The 16-bit init refers to the reset vector and the small amount of code to
+# get the processor into 32-bit mode. It may be in SPL or in U-Boot proper,
+# or missing altogether if U-Boot is started from EFI or coreboot.
+#
+# The 32-bit init refers to processor init, running binary blobs including
+# FSP, setting up interrupts and anything else that needs to be done in
+# 32-bit code. It is normally in the same place as 16-bit init if that is
+# enabled (i.e. they are both in SPL, or both in U-Boot proper).
+config X86_16BIT_INIT
+ bool
+ depends on X86_RESET_VECTOR
+ default y if X86_RESET_VECTOR && !SPL
+ help
+ This is enabled when 16-bit init is in U-Boot proper
+
+config SPL_X86_16BIT_INIT
+ bool
+ depends on X86_RESET_VECTOR
+ default y if X86_RESET_VECTOR && SPL
+ help
+ This is enabled when 16-bit init is in SPL
+
+config X86_32BIT_INIT
+ bool
+ depends on X86_RESET_VECTOR
+ default y if X86_RESET_VECTOR && !SPL
+ help
+ This is enabled when 32-bit init is in U-Boot proper
+
+config SPL_X86_32BIT_INIT
+ bool
+ depends on X86_RESET_VECTOR
+ default y if X86_RESET_VECTOR && SPL
+ help
+ This is enabled when 32-bit init is in SPL
+
config RESET_SEG_START
hex
depends on X86_RESET_VECTOR
depends on X86_RESET_VECTOR
default 0xfffff800
+config X86_LOAD_FROM_32_BIT
+ bool "Boot from a 32-bit program"
+ help
+ Define this to boot U-Boot from a 32-bit program which sets
+ the GDT differently. This can be used to boot directly from
+ any stage of coreboot, for example, bypassing the normal
+ payload-loading feature.
+
config BOARD_ROMSIZE_KB_512
bool
config BOARD_ROMSIZE_KB_1024
to be used for speeding up boot time on future reboots and/or
power cycles.
+ For platforms that use Intel FSP for the memory initialization,
+ please check FSP output HOB via U-Boot command 'fsp hob' to see
+ if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
+ If such GUID does not exist, MRC cache is not avaiable on such
+ platform (eg: Intel Queensbay), which means selecting this option
+ here does not make any difference.
+
config HAVE_MRC
bool "Add a System Agent binary"
depends on !HAVE_FSP
config GENERATE_ACPI_TABLE
bool "Generate an ACPI (Advanced Configuration and Power Interface) table"
default n
+ select QFW if QEMU
help
The Advanced Configuration and Power Interface (ACPI) specification
provides an open standard for device configuration and management
by the operating system. It defines platform-independent interfaces
for configuration and power management monitoring.
-config QEMU_ACPI_TABLE
- bool "Load ACPI table from QEMU fw_cfg interface"
- depends on GENERATE_ACPI_TABLE && QEMU
- default y
- help
- By default, U-Boot generates its own ACPI tables. This option, if
- enabled, disables U-Boot's version and loads ACPI tables generated
- by QEMU.
-
-config GENERATE_SMBIOS_TABLE
- bool "Generate an SMBIOS (System Management BIOS) table"
- default y
- help
- The System Management BIOS (SMBIOS) specification addresses how
- motherboard and system vendors present management information about
- their products in a standard format by extending the BIOS interface
- on Intel architecture systems.
-
- Check http://www.dmtf.org/standards/smbios for details.
-
endmenu
config MAX_PIRQ_LINKS
Intel 8254 timer contains three counters which have fixed uses.
Include this to have U-Boot set up the timer correctly.
-config I8042_KEYB
- default y
-
-config DM_KEYBOARD
- default y
-
config SEABIOS
bool "Support booting SeaBIOS"
help
Check http://www.seabios.org/SeaBIOS for details.
+config HIGH_TABLE_SIZE
+ hex "Size of configuration tables which reside in high memory"
+ default 0x10000
+ depends on SEABIOS
+ help
+ SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
+ configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot
+ puts a copy of configuration tables in high memory region which
+ is reserved on the stack before relocation. The region size is
+ determined by this option.
+
+ Increse it if the default size does not fit the board's needs.
+ This is most likely due to a large ACPI DSDT table is used.
+
source "arch/x86/lib/efi/Kconfig"
endmenu
projects / u-boot / blobdiff