Exynos542x: Add and enable get_periph_rate support

[u-boot] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 85dda2e1ead312d2a8aecb62f2d6262968c76c50..fef11f35528f4c830ade43d469d1e52ae89f6bac 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -348,26 +348,6 @@ config FRAMEBUFFER_VESA_MODE
 
 endmenu
 
-config TSC_CALIBRATION_BYPASS
-       bool "Bypass Time-Stamp Counter (TSC) calibration"
-       default n
-       help
-         By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
-         running frequency via Model-Specific Register (MSR) and Programmable
-         Interval Timer (PIT). If the calibration does not work on your board,
-         select this option and provide a hardcoded TSC running frequency with
-         CONFIG_TSC_FREQ_IN_MHZ below.
-
-         Normally this option should be turned on in a simulation environment
-         like qemu.
-
-config TSC_FREQ_IN_MHZ
-       int "Time-Stamp Counter (TSC) running frequency in MHz"
-       depends on TSC_CALIBRATION_BYPASS
-       default 1000
-       help
-         The running frequency in MHz of Time-Stamp Counter (TSC).
-
 config HAVE_FSP
        bool "Add an Firmware Support Package binary"
        help
@@ -416,6 +396,26 @@ source "arch/x86/cpu/quark/Kconfig"
 
 source "arch/x86/cpu/queensbay/Kconfig"
 
+config TSC_CALIBRATION_BYPASS
+       bool "Bypass Time-Stamp Counter (TSC) calibration"
+       default n
+       help
+         By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
+         running frequency via Model-Specific Register (MSR) and Programmable
+         Interval Timer (PIT). If the calibration does not work on your board,
+         select this option and provide a hardcoded TSC running frequency with
+         CONFIG_TSC_FREQ_IN_MHZ below.
+
+         Normally this option should be turned on in a simulation environment
+         like qemu.
+
+config TSC_FREQ_IN_MHZ
+       int "Time-Stamp Counter (TSC) running frequency in MHz"
+       depends on TSC_CALIBRATION_BYPASS
+       default 1000
+       help
+         The running frequency in MHz of Time-Stamp Counter (TSC).
+
 source "board/coreboot/coreboot/Kconfig"
 
 source "board/google/chromebook_link/Kconfig"
@@ -428,7 +428,7 @@ source "board/intel/galileo/Kconfig"
 
 config PCIE_ECAM_BASE
        hex
-    default 0xe0000000
+       default 0xe0000000
        help
          This is the memory-mapped address of PCI configuration space, which
          is only available through the Enhanced Configuration Access