x86: Convert to use driver model timer

[u-boot] / arch / x86 / cpu / baytrail / valleyview.c

diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 6c3dfe894f171da584c9efd4b1c092335346538c..9b30451b28e7ab95e8a8e3fc3ec6bafe0394416f 100644 (file)
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -8,8 +8,8 @@
 #include <mmc.h>
 #include <pci_ids.h>
 #include <asm/irq.h>
+#include <asm/mrccache.h>
 #include <asm/post.h>
-#include <asm/fsp/fsp_support.h>
 
 static struct pci_device_id mmc_supported[] = {
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
@@ -28,9 +28,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)
@@ -41,14 +38,33 @@ int arch_cpu_init(void)
 
 int arch_misc_init(void)
 {
-       int ret;
-
        if (!ll_boot_init())
                return 0;
-       ret = pirq_init();
-       if (ret)
-               return ret;
 
-       return fsp_init_phase_pci();
+#ifdef CONFIG_ENABLE_MRC_CACHE
+       /*
+        * We intend not to check any return value here, as even MRC cache
+        * is not saved successfully, it is not a severe error that will
+        * prevent system from continuing to boot.
+        */
+       mrccache_save();
+#endif
+
+       return pirq_init();
+}
+
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+       return mrccache_reserve();
+#else
+       return 0;
+#endif
 }
 #endif
+
+void reset_cpu(ulong addr)
+{
+       /* cold reset */
+       x86_full_reset();
+}