Merge branch 'master' of git://git.denx.de/u-boot-x86

[u-boot] / arch / x86 / cpu / coreboot / coreboot.c

diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 6e196d786c5afbba4a56376001ceefa425310079..14cb6994cfa787c3dd7265bb0b04ff5ad34f94a0 100644 (file)
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -26,6 +26,7 @@
 #include <asm/u-boot-x86.h>
 #include <flash.h>
 #include <netdev.h>
+#include <ns16550.h>
 #include <asm/msr.h>
 #include <asm/cache.h>
 #include <asm/io.h>
@@ -35,8 +36,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
-
 /*
  * Miscellaneous platform dependent initializations
  */
@@ -70,32 +69,31 @@ int board_early_init_r(void)
 void show_boot_progress(int val)
 {
 #if MIN_PORT80_KCLOCKS_DELAY
-       static uint32_t prev_stamp;
-       static uint32_t base;
-
        /*
         * Scale the time counter reading to avoid using 64 bit arithmetics.
         * Can't use get_timer() here becuase it could be not yet
         * initialized or even implemented.
         */
-       if (!prev_stamp) {
-               base = rdtsc() / 1000;
-               prev_stamp = 0;
+       if (!gd->arch.tsc_prev) {
+               gd->arch.tsc_base_kclocks = rdtsc() / 1000;
+               gd->arch.tsc_prev = 0;
        } else {
                uint32_t now;
 
                do {
-                       now = rdtsc() / 1000 - base;
-               } while (now < (prev_stamp + MIN_PORT80_KCLOCKS_DELAY));
-               prev_stamp = now;
+                       now = rdtsc() / 1000 - gd->arch.tsc_base_kclocks;
+               } while (now < (gd->arch.tsc_prev + MIN_PORT80_KCLOCKS_DELAY));
+               gd->arch.tsc_prev = now;
        }
 #endif
        outb(val, 0x80);
 }
 
-
 int last_stage_init(void)
 {
+       if (gd->flags & GD_FLG_COLD_BOOT)
+               timestamp_add_to_bootstage();
+
        return 0;
 }
 
@@ -111,10 +109,6 @@ int board_eth_init(bd_t *bis)
        return pci_eth_init(bis);
 }
 
-void setup_pcat_compatibility()
-{
-}
-
 #define MTRR_TYPE_WP          5
 #define MTRRcap_MSR           0xfe
 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
@@ -145,3 +139,12 @@ int board_final_cleanup(void)
 
        return 0;
 }
+
+void panic_puts(const char *str)
+{
+       NS16550_t port = (NS16550_t)0x3f8;
+
+       NS16550_init(port, 1);
+       while (*str)
+               NS16550_putc(port, *str++);
+}