Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[u-boot] / arch / x86 / cpu / coreboot / pci.c

diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index 0ddc97501b7807ef72c322d0e88ab5e2bf4b9846..67eb14ce99406dd90c6bb819715a9d94f8f2d4c5 100644 (file)
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -6,40 +6,42 @@
  * (C) Copyright 2002
  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <dm.h>
+#include <errno.h>
 #include <pci.h>
+#include <asm/io.h>
 #include <asm/pci.h>
 
-static struct pci_controller coreboot_hose;
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct dm_pci_ops pci_x86_ops = {
+       .read_config    = pci_x86_read_config,
+       .write_config   = pci_x86_write_config,
+};
 
-void pci_init_board(void)
-{
-       coreboot_hose.first_busno = 0;
-       coreboot_hose.last_busno = 0xff;
-       coreboot_hose.region_count = 0;
+static const struct udevice_id pci_x86_ids[] = {
+       { .compatible = "pci-x86" },
+       { }
+};
 
-       pci_setup_type1(&coreboot_hose);
+U_BOOT_DRIVER(pci_x86_drv) = {
+       .name           = "pci_x86",
+       .id             = UCLASS_PCI,
+       .of_match       = pci_x86_ids,
+       .ops            = &pci_x86_ops,
+};
 
-       pci_register_hose(&coreboot_hose);
+static const struct udevice_id generic_pch_ids[] = {
+       { .compatible = "intel,pch" },
+       { }
+};
 
-       coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose);
-}
+U_BOOT_DRIVER(generic_pch_drv) = {
+       .name           = "pch",
+       .id             = UCLASS_PCH,
+       .of_match       = generic_pch_ids,
+};