x86: Issue SMI to finalize Coreboot in final stage

[u-boot] / arch / x86 / cpu / coreboot / sdram.c

diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index b56085a9325987d591c68fedabe098f6b49d2dad..76274cb88e3824ea3b066afffd7068c2b97832d8 100644 (file)
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -23,17 +23,121 @@
  */
 
 #include <common.h>
+#include <malloc.h>
+#include <asm/e820.h>
 #include <asm/u-boot-x86.h>
+#include <asm/global_data.h>
+#include <asm/processor.h>
+#include <asm/arch/sysinfo.h>
+#include <asm/arch/tables.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+{
+       int i;
+
+       unsigned num_entries = min(lib_sysinfo.n_memranges, max_entries);
+       if (num_entries < lib_sysinfo.n_memranges) {
+               printf("Warning: Limiting e820 map to %d entries.\n",
+                       num_entries);
+       }
+       for (i = 0; i < num_entries; i++) {
+               struct memrange *memrange = &lib_sysinfo.memrange[i];
+
+               entries[i].addr = memrange->base;
+               entries[i].size = memrange->size;
+               entries[i].type = memrange->type;
+       }
+       return num_entries;
+}
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary. It
+ * overrides the default implementation found elsewhere which simply picks the
+ * end of ram, wherever that may be. The location of the stack, the relocation
+ * address, and how far U-Boot is moved by relocation are set in the global
+ * data structure.
+ */
+int calculate_relocation_address(void)
+{
+       const uint64_t uboot_size = (uintptr_t)&__bss_end -
+                       (uintptr_t)&__text_start;
+       const uint64_t total_size = uboot_size + CONFIG_SYS_MALLOC_LEN +
+               CONFIG_SYS_STACK_SIZE;
+       uintptr_t dest_addr = 0;
+       int i;
+
+       for (i = 0; i < lib_sysinfo.n_memranges; i++) {
+               struct memrange *memrange = &lib_sysinfo.memrange[i];
+               /* Force U-Boot to relocate to a page aligned address. */
+               uint64_t start = roundup(memrange->base, 1 << 12);
+               uint64_t end = memrange->base + memrange->size;
+
+               /* Ignore non-memory regions. */
+               if (memrange->type != CB_MEM_RAM)
+                       continue;
+
+               /* Filter memory over 4GB. */
+               if (end > 0xffffffffULL)
+                       end = 0x100000000ULL;
+               /* Skip this region if it's too small. */
+               if (end - start < total_size)
+                       continue;
+
+               /* Use this address if it's the largest so far. */
+               if (end - uboot_size > dest_addr)
+                       dest_addr = end;
+       }
+
+       /* If no suitable area was found, return an error. */
+       if (!dest_addr)
+               return 1;
+
+       dest_addr -= uboot_size;
+       dest_addr &= ~((1 << 12) - 1);
+       gd->relocaddr = dest_addr;
+       gd->reloc_off = dest_addr - (uintptr_t)&__text_start;
+       gd->start_addr_sp = dest_addr - CONFIG_SYS_MALLOC_LEN;
+
+       return 0;
+}
+
 int dram_init_f(void)
 {
-       gd->ram_size = 64*1024*1024;
+       int i;
+       phys_size_t ram_size = 0;
+
+       for (i = 0; i < lib_sysinfo.n_memranges; i++) {
+               struct memrange *memrange = &lib_sysinfo.memrange[i];
+               unsigned long long end = memrange->base + memrange->size;
+
+               if (memrange->type == CB_MEM_RAM && end > ram_size)
+                       ram_size = end;
+       }
+       gd->ram_size = ram_size;
+       if (ram_size == 0)
+               return -1;
        return 0;
 }
 
 int dram_init(void)
 {
+       int i, j;
+
+       if (CONFIG_NR_DRAM_BANKS) {
+               for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) {
+                       struct memrange *memrange = &lib_sysinfo.memrange[i];
+
+                       if (memrange->type == CB_MEM_RAM) {
+                               gd->bd->bi_dram[j].start = memrange->base;
+                               gd->bd->bi_dram[j].size = memrange->size;
+                               j++;
+                               if (j >= CONFIG_NR_DRAM_BANKS)
+                                       break;
+                       }
+               }
+       }
        return 0;
 }