dm: x86: Drop the weak cpu_irq_init() function

[u-boot] / arch / x86 / cpu / cpu.c

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index b9134cfef3747602ea8cee9cc4964afae8511abd..381d83526fbf63612f0fa8d27197a8e8af2fed6a 100644 (file)
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -136,19 +136,27 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
        asm volatile("lgdtl %0\n" : : "m" (gdt));
 }
 
-void setup_gdt(gd_t *id, u64 *gdt_addr)
+void arch_setup_gd(gd_t *new_gd)
 {
-       id->arch.gdt = gdt_addr;
-       /* CS: code, read/execute, 4 GB, base 0 */
+       u64 *gdt_addr;
+
+       gdt_addr = new_gd->arch.gdt;
+
+       /*
+        * CS: code, read/execute, 4 GB, base 0
+        *
+        * Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS
+        */
+       gdt_addr[X86_GDT_ENTRY_UNUSED] = GDT_ENTRY(0xc09b, 0, 0xfffff);
        gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
 
        /* DS: data, read/write, 4 GB, base 0 */
        gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
 
        /* FS: data, read/write, 4 GB, base (Global Data Pointer) */
-       id->arch.gd_addr = id;
+       new_gd->arch.gd_addr = new_gd;
        gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
-                    (ulong)&id->arch.gd_addr, 0xfffff);
+                    (ulong)&new_gd->arch.gd_addr, 0xfffff);
 
        /* 16-bit CS: code, read/execute, 64 kB, base 0 */
        gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x009b, 0, 0x0ffff);
@@ -330,13 +338,15 @@ int x86_cpu_init_f(void)
        const u32 em_rst = ~X86_CR0_EM;
        const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
 
-       /* initialize FPU, reset EM, set MP and NE */
-       asm ("fninit\n" \
-            "movl %%cr0, %%eax\n" \
-            "andl %0, %%eax\n" \
-            "orl  %1, %%eax\n" \
-            "movl %%eax, %%cr0\n" \
-            : : "i" (em_rst), "i" (mp_ne_set) : "eax");
+       if (ll_boot_init()) {
+               /* initialize FPU, reset EM, set MP and NE */
+               asm ("fninit\n" \
+               "movl %%cr0, %%eax\n" \
+               "andl %0, %%eax\n" \
+               "orl  %1, %%eax\n" \
+               "movl %%eax, %%cr0\n" \
+               : : "i" (em_rst), "i" (mp_ne_set) : "eax");
+       }
 
        /* identify CPU via cpuid and store the decoded info into gd->arch */
        if (has_cpuid()) {
@@ -389,6 +399,11 @@ int x86_cpu_init_f(void)
                }
        }
 
+#ifdef CONFIG_I8254_TIMER
+       /* Set up the i8254 timer if required */
+       i8254_init();
+#endif
+
        return 0;
 }
 
@@ -456,7 +471,7 @@ void x86_full_reset(void)
 
 int dcache_status(void)
 {
-       return !(read_cr0() & 0x40000000);
+       return !(read_cr0() & X86_CR0_CD);
 }
 
 /* Define these functions to allow ehch-hcd to function */
@@ -631,24 +646,6 @@ int cpu_jump_to_64bit(ulong setup_base, ulong target)
 
 void show_boot_progress(int val)
 {
-#if MIN_PORT80_KCLOCKS_DELAY
-       /*
-        * Scale the time counter reading to avoid using 64 bit arithmetics.
-        * Can't use get_timer() here becuase it could be not yet
-        * initialized or even implemented.
-        */
-       if (!gd->arch.tsc_prev) {
-               gd->arch.tsc_base_kclocks = rdtsc() / 1000;
-               gd->arch.tsc_prev = 0;
-       } else {
-               uint32_t now;
-
-               do {
-                       now = rdtsc() / 1000 - gd->arch.tsc_base_kclocks;
-               } while (now < (gd->arch.tsc_prev + MIN_PORT80_KCLOCKS_DELAY));
-               gd->arch.tsc_prev = now;
-       }
-#endif
        outb(val, POST_PORT);
 }
 
@@ -712,5 +709,8 @@ __weak int x86_init_cpus(void)
 
 int cpu_init_r(void)
 {
-       return x86_init_cpus();
+       if (ll_boot_init())
+               return x86_init_cpus();
+
+       return 0;
 }