+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2014 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
#include <pch.h>
-#include <syscon.h>
#include <asm/cpu.h>
+#include <asm/intel_regs.h>
#include <asm/io.h>
#include <asm/lapic.h>
+#include <asm/lpc_common.h>
#include <asm/pci.h>
-#include <asm/arch/bd82x6x.h>
#include <asm/arch/model_206ax.h>
#include <asm/arch/pch.h>
#include <asm/arch/sandybridge.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define GPIO_BASE 0x48
#define BIOS_CTRL 0xdc
+#ifndef CONFIG_HAVE_FSP
static int pch_revision_id = -1;
static int pch_type = -1;
static int bd82x6x_probe(struct udevice *dev)
{
- struct udevice *gma_dev;
- int ret;
-
if (!(gd->flags & GD_FLG_RELOC))
return 0;
/* Cause the SATA device to do its init */
- uclass_first_device(UCLASS_DISK, &dev);
-
- ret = syscon_get_by_driver_data(X86_SYSCON_GMA, &gma_dev);
- if (ret)
- return ret;
- ret = gma_func0_init(gma_dev);
- if (ret)
- return ret;
+ uclass_first_device(UCLASS_AHCI, &dev);
return 0;
}
+#endif /* CONFIG_HAVE_FSP */
static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)
{
static int bd82x6x_set_spi_protect(struct udevice *dev, bool protect)
{
- uint8_t bios_cntl;
-
- /* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */
- dm_pci_read_config8(dev, BIOS_CTRL, &bios_cntl);
- if (protect) {
- bios_cntl &= ~BIOS_CTRL_BIOSWE;
- bios_cntl |= BIT(5);
- } else {
- bios_cntl |= BIOS_CTRL_BIOSWE;
- bios_cntl &= ~BIT(5);
- }
- dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl);
-
- return 0;
+ return lpc_set_spi_protect(dev, BIOS_CTRL, protect);
}
static int bd82x6x_get_gpio_base(struct udevice *dev, u32 *gbasep)
.name = "bd82x6x",
.id = UCLASS_PCH,
.of_match = bd82x6x_ids,
+#ifndef CONFIG_HAVE_FSP
.probe = bd82x6x_probe,
+#endif
.ops = &bd82x6x_pch_ops,
};