int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
- timer_set_base(rdtsc());
return x86_cpu_init_f();
}
pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT);
if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) {
-#if CONFIG_HAVE_ACPI_RESUME
- debug("Resume from S3 detected.\n");
- boot_mode = PEI_BOOT_RESUME;
- /* Clear SLP_TYPE. This will break stage2 but
- * we care for that when we get there.
- */
- outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + PM1_CNT);
-#else
debug("Resume from S3 detected, but disabled.\n");
-#endif
} else {
/*
* TODO: An indication of life might be possible here (e.g.
return 0;
}
+
+void board_debug_uart_init(void)
+{
+ /* This enables the debug UART */
+ pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN,
+ PCI_SIZE_16);
+}