x86: ivybridge: Drop the unused bd82x6x_init_extra()

[u-boot] / arch / x86 / cpu / ivybridge / microcode_intel.c

diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c
index 79c075fbf25b52c51ad9f0327d30762d743f41c8..2440a97c484ba801698f2cf1003b924d06161b3b 100644 (file)
--- a/arch/x86/cpu/ivybridge/microcode_intel.c
+++ b/arch/x86/cpu/ivybridge/microcode_intel.c
@@ -13,7 +13,9 @@
 #include <libfdt.h>
 #include <asm/cpu.h>
 #include <asm/msr.h>
+#include <asm/msr-index.h>
 #include <asm/processor.h>
+#include <asm/arch/microcode.h>
 
 /**
  * struct microcode_update - standard microcode header from Intel
@@ -40,8 +42,8 @@ static int microcode_decode_node(const void *blob, int node,
        update->data = fdt_getprop(blob, node, "data", &update->size);
        if (!update->data)
                return -EINVAL;
-       update->data += 48;
-       update->size -= 48;
+       update->data += UCODE_HEADER_LEN;
+       update->size -= UCODE_HEADER_LEN;
 
        update->header_version = fdtdec_get_int(blob, node,
                                                "intel,header-version", 0);
@@ -50,17 +52,17 @@ static int microcode_decode_node(const void *blob, int node,
        update->date_code = fdtdec_get_int(blob, node,
                                           "intel,date-code", 0);
        update->processor_signature = fdtdec_get_int(blob, node,
-                                       "intel.processor-signature", 0);
+                                       "intel,processor-signature", 0);
        update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
        update->loader_revision = fdtdec_get_int(blob, node,
-                                                "loader-revision", 0);
+                                                "intel,loader-revision", 0);
        update->processor_flags = fdtdec_get_int(blob, node,
-                                                "processor-flags", 0);
+                                                "intel,processor-flags", 0);
 
        return 0;
 }
 
-static uint32_t microcode_read_rev(void)
+static inline uint32_t microcode_read_rev(void)
 {
        /*
         * Some Intel CPUs can be very finicky about the CPUID sequence used.
@@ -71,15 +73,16 @@ static uint32_t microcode_read_rev(void)
        asm volatile (
                "xorl %%eax, %%eax\n"
                "xorl %%edx, %%edx\n"
-               "movl $0x8b, %%ecx\n"
+               "movl %2, %%ecx\n"
                "wrmsr\n"
                "movl $0x01, %%eax\n"
                "cpuid\n"
-               "movl $0x8b, %%ecx\n"
+               "movl %2, %%ecx\n"
                "rdmsr\n"
                : /* outputs */
                "=a" (low), "=d" (high)
                : /* inputs */
+               "i" (MSR_IA32_UCODE_REV)
                : /* clobbers */
                 "ebx", "ecx"
        );
@@ -94,9 +97,9 @@ static void microcode_read_cpu(struct microcode_update *cpu)
        struct cpuid_result result;
        uint32_t low, high;
 
-       wrmsr(0x8b, 0, 0);
+       wrmsr(MSR_IA32_UCODE_REV, 0, 0);
        result = cpuid(1);
-       rdmsr(0x8b, low, cpu->update_revision);
+       rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
        x86_model = (result.eax >> 4) & 0x0f;
        x86_family = (result.eax >> 8) & 0x0f;
        cpu->processor_signature = result.eax;
@@ -116,19 +119,22 @@ int microcode_update_intel(void)
 {
        struct microcode_update cpu, update;
        const void *blob = gd->fdt_blob;
+       int skipped;
        int count;
        int node;
        int ret;
+       int rev;
 
        microcode_read_cpu(&cpu);
        node = 0;
        count = 0;
+       skipped = 0;
        do {
                node = fdtdec_next_compatible(blob, node,
                                              COMPAT_INTEL_MICROCODE);
                if (node < 0) {
                        debug("%s: Found %d updates\n", __func__, count);
-                       return count ? 0 : -ENOENT;
+                       return count ? 0 : skipped ? -EEXIST : -ENOENT;
                }
 
                ret = microcode_decode_node(blob, node, &update);
@@ -137,17 +143,24 @@ int microcode_update_intel(void)
                              ret);
                        return ret;
                }
-               if (update.processor_signature == cpu.processor_signature &&
-                   (update.processor_flags & cpu.processor_flags)) {
-                       debug("%s: Update already exists\n", __func__);
-                       return -EEXIST;
+               if (!(update.processor_signature == cpu.processor_signature &&
+                     (update.processor_flags & cpu.processor_flags))) {
+                       debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
+                             __func__, update.processor_signature,
+                             update.processor_flags);
+                       skipped++;
+                       continue;
                }
-
-               wrmsr(0x79, (ulong)update.data, 0);
+               wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
+               rev = microcode_read_rev();
                debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
-                     microcode_read_rev(), update.date_code & 0xffff,
+                     rev, update.date_code & 0xffff,
                      (update.date_code >> 24) & 0xff,
                      (update.date_code >> 16) & 0xff);
+               if (update.update_revision != rev) {
+                       printf("Microcode update failed\n");
+                       return -EFAULT;
+               }
                count++;
        } while (1);
 }