#include <dm.h>
#include <errno.h>
#include <malloc.h>
-#include <qemu_fw_cfg.h>
+#include <qfw.h>
#include <asm/atomic.h>
#include <asm/cpu.h>
#include <asm/interrupt.h>
if (!stack)
return -ENOMEM;
params->stack_top = (u32)(stack + size);
-#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
+#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && \
+ !defined(CONFIG_INTEL_MID)
params->microcode_ptr = ucode_base;
debug("Microcode at %x\n", params->microcode_ptr);
#endif
cpu_get_name(processor_name);
debug("CPU: %s\n", processor_name);
- lapic_setup();
-
apic_id = lapicid();
ret = find_cpu_by_apic_id(apic_id, devp);
if (ret) {
return 0;
}
-#ifdef CONFIG_QEMU
+#ifdef CONFIG_QFW
static int qemu_cpu_fixup(void)
{
int ret;
if (ret)
return ret;
-#ifdef CONFIG_QEMU
+#ifdef CONFIG_QFW
ret = qemu_cpu_fixup();
if (ret)
return ret;
* seq num in the uclass_resolve_seq() during device_probe(). To avoid
* this, set req_seq to the reg number in the device tree in advance.
*/
- cpu->req_seq = fdtdec_get_int(gd->fdt_blob, cpu->of_offset, "reg", -1);
+ cpu->req_seq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(cpu), "reg",
+ -1);
plat->ucode_version = microcode_read_rev();
plat->device_id = gd->arch.x86_device;