]> git.sur5r.net Git - u-boot/blobdiff - arch/x86/cpu/pci.c
x86: Support machines with >4GB of RAM
[u-boot] / arch / x86 / cpu / pci.c
index 2d8f16c5da5de0dc5ac315aea97213068ba3cb22..ab1aaaa0599e0e195f910fd3c27e2fe3c28b9b6f 100644 (file)
@@ -15,6 +15,8 @@
 #include <pci.h>
 #include <asm/pci.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static struct pci_controller x86_hose;
 
 int pci_early_init_hose(struct pci_controller **hosep)
@@ -27,22 +29,85 @@ int pci_early_init_hose(struct pci_controller **hosep)
 
        board_pci_setup_hose(hose);
        pci_setup_type1(hose);
-       gd->arch.hose = hose;
+       hose->last_busno = pci_hose_scan(hose);
+       gd->hose = hose;
        *hosep = hose;
 
        return 0;
 }
 
+__weak int board_pci_pre_scan(struct pci_controller *hose)
+{
+       return 0;
+}
+
+__weak int board_pci_post_scan(struct pci_controller *hose)
+{
+       return 0;
+}
+
 void pci_init_board(void)
 {
        struct pci_controller *hose = &x86_hose;
 
        /* Stop using the early hose */
-       gd->arch.hose = NULL;
+       gd->hose = NULL;
 
        board_pci_setup_hose(hose);
        pci_setup_type1(hose);
        pci_register_hose(hose);
 
+       board_pci_pre_scan(hose);
        hose->last_busno = pci_hose_scan(hose);
+       board_pci_post_scan(hose);
+}
+
+static struct pci_controller *get_hose(void)
+{
+       if (gd->hose)
+               return gd->hose;
+
+       return pci_bus_to_hose(0);
+}
+
+unsigned int pci_read_config8(pci_dev_t dev, unsigned where)
+{
+       uint8_t value;
+
+       pci_hose_read_config_byte(get_hose(), dev, where, &value);
+
+       return value;
+}
+
+unsigned int pci_read_config16(pci_dev_t dev, unsigned where)
+{
+       uint16_t value;
+
+       pci_hose_read_config_word(get_hose(), dev, where, &value);
+
+       return value;
+}
+
+unsigned int pci_read_config32(pci_dev_t dev, unsigned where)
+{
+       uint32_t value;
+
+       pci_hose_read_config_dword(get_hose(), dev, where, &value);
+
+       return value;
+}
+
+void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value)
+{
+       pci_hose_write_config_byte(get_hose(), dev, where, value);
+}
+
+void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value)
+{
+       pci_hose_write_config_word(get_hose(), dev, where, value);
+}
+
+void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value)
+{
+       pci_hose_write_config_dword(get_hose(), dev, where, value);
 }