x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONS

[u-boot] / arch / x86 / cpu / start.S

diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index f9662fb20345731311628ac84501297bead08ae6..00e585e19bfccdd4e0465c9575b98d137fc811b4 100644 (file)
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -11,7 +11,6 @@
  */
 
 #include <config.h>
-#include <version.h>
 #include <asm/global_data.h>
 #include <asm/post.h>
 #include <asm/processor.h>
@@ -75,6 +74,7 @@ early_board_init_ret:
        jmp     car_init
 .globl car_init_ret
 car_init_ret:
+#ifndef CONFIG_HAVE_FSP
        /*
         * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
         * or fully initialised SDRAM - we really don't care which)
@@ -95,6 +95,12 @@ car_init_ret:
 #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
        subl    $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
 #endif
+#else
+       /*
+        * When we get here after car_init, esp points to a temporary stack
+        * and esi holds the HOB list address returned by the FSP.
+        */
+#endif
 
        /* Reserve space on stack for global data */
        subl    $GENERATED_GBL_DATA_SIZE, %esp
@@ -109,6 +115,17 @@ car_init_ret:
        movl    %esp, %edi
        rep     stosb
 
+#ifdef CONFIG_HAVE_FSP
+       test    %esi, %esi
+       jz      skip_hob
+
+       /* Store HOB list */
+       movl    %esp, %edx
+       addl    $GD_HOB_LIST, %edx
+       movl    %esi, (%edx)
+
+skip_hob:
+#endif
        /* Setup first parameter to setup_gdt, pointer to global_data */
        movl    %esp, %eax
 
@@ -191,6 +208,14 @@ board_init_f_r_trampoline:
        /* Setup global descriptor table so gd->xyz works */
        call    setup_gdt
 
+       /* Set if we need to disable CAR */
+.weak  car_uninit
+       movl    $car_uninit, %eax
+       cmpl    $0, %eax
+       jz      1f
+
+       call    car_uninit
+1:
        /* Re-enter U-Boot by calling board_init_f_r */
        call    board_init_f_r