pch_pinctrl {
compatible = "intel,x86-pinctrl";
+ reg = <0 0>;
+
+ /*
+ * As of today, the latest version FSP (gold4) for BayTrail
+ * misses the PAD configuration of the SD controller's Card
+ * Detect signal. The default PAD value for the CD pin sets
+ * the pin to work in GPIO mode, which causes card detect
+ * status cannot be reflected by the Present State register
+ * in the SD controller (bit 16 & bit 18 are always zero).
+ *
+ * Configure this pin to function 1 (SD controller).
+ */
+ sdmmc3_cd@0 {
+ pad-offset = <0x3a0>;
+ mode-func = <1>;
+ };
+
+ /* Add SMBus PAD configuration */
+ smbus_clk@0 {
+ pad-offset = <0x580>;
+ mode-func = <1>;
+ };
+
+ smbus_data@0 {
+ pad-offset = <0x5a0>;
+ mode-func = <1>;
+ };
};
chosen {
compatible = "intel,irq-router";
intel,pirq-config = "ibase";
intel,ibase-offset = <0x50>;
+ intel,actl-addr = <0>;
intel,pirq-link = <8 8>;
intel,pirq-mask = <0xdee0>;
intel,pirq-routing = <
fsp,mrc-init-mmio-size = <0x800>;
fsp,mrc-init-spd-addr1 = <0xa0>;
fsp,mrc-init-spd-addr2 = <0xa2>;
- fsp,emmc-boot-mode = <2>;
+ fsp,emmc-boot-mode = <1>;
fsp,enable-sdio;
fsp,enable-sdcard;
fsp,enable-hsuart1;
fsp,lpss-sio-enable-pci-mode;
fsp,enable-dma0;
fsp,enable-dma1;
- fsp,enable-i2c0;
- fsp,enable-i2c1;
- fsp,enable-i2c2;
- fsp,enable-i2c3;
- fsp,enable-i2c4;
- fsp,enable-i2c5;
- fsp,enable-i2c6;
fsp,enable-pwm0;
fsp,enable-pwm1;
fsp,igd-dvmt50-pre-alloc = <2>;
microcode {
update@0 {
-#include "microcode/m0130673322.dtsi"
+#include "microcode/m0130673325.dtsi"
};
update@1 {
-#include "microcode/m0130679901.dtsi"
+#include "microcode/m0130679907.dtsi"
};
};
};