]> git.sur5r.net Git - u-boot/blobdiff - arch/x86/dts/crownbay.dts
ARM: uniphier: set DRAM_SPARSE flag for LD21 boards
[u-boot] / arch / x86 / dts / crownbay.dts
index ee8302cf7ecf775b3ef170032c9129de4c7970a8..78a1ef415ca2417ed6907addb854781738c180ba 100644 (file)
 
        };
 
-       gpioa {
-               compatible = "intel,ich6-gpio";
-               u-boot,dm-pre-reloc;
-               reg = <0 0x20>;
-               bank-name = "A";
-       };
-
-       gpiob {
-               compatible = "intel,ich6-gpio";
-               u-boot,dm-pre-reloc;
-               reg = <0x20 0x20>;
-               bank-name = "B";
-       };
-
        chosen {
                /*
                 * By default the legacy superio serial port is used as the
                pch@1f,0 {
                        reg = <0x0000f800 0 0 0 0>;
                        compatible = "intel,pch7";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
 
                        irq-router {
                                compatible = "intel,queensbay-irq-router";
                                intel,pirq-config = "pci";
+                               intel,actl-addr = <0x58>;
                                intel,pirq-link = <0x60 8>;
                                intel,pirq-mask = <0xcee0>;
                                intel,pirq-routing = <
                                        memory-map = <0xffe00000 0x00200000>;
                                };
                        };
+
+                       gpioa {
+                               compatible = "intel,ich6-gpio";
+                               u-boot,dm-pre-reloc;
+                               reg = <0 0x20>;
+                               bank-name = "A";
+                       };
+
+                       gpiob {
+                               compatible = "intel,ich6-gpio";
+                               u-boot,dm-pre-reloc;
+                               reg = <0x20 0x20>;
+                               bank-name = "B";
+                       };
                };
        };