]> git.sur5r.net Git - u-boot/blobdiff - arch/x86/dts/galileo.dts
Merge git://git.denx.de/u-boot-mpc85xx
[u-boot] / arch / x86 / dts / galileo.dts
index 14a19c3ec33fea5d4b205484667df9cfb93d3be2..60dbc5f8a30c657dcb112fb56faf22ed46e718cf 100644 (file)
@@ -6,12 +6,18 @@
 
 /dts-v1/;
 
+#include <dt-bindings/mrc/quark.h>
+
 /include/ "skeleton.dtsi"
 
 / {
        model = "Intel Galileo";
        compatible = "intel,galileo", "intel,quark";
 
+       aliases {
+               spi0 = "/spi";
+       };
+
        config {
                silent_console = <0>;
        };
                stdout-path = &pciuart0;
        };
 
+       mrc {
+               compatible = "intel,quark-mrc";
+               flags = <MRC_FLAG_SCRAMBLE_EN>;
+               dram-width = <DRAM_WIDTH_X8>;
+               dram-speed = <DRAM_FREQ_800>;
+               dram-type = <DRAM_TYPE_DDR3>;
+               rank-mask = <DRAM_RANK(0)>;
+               chan-mask = <DRAM_CHANNEL(0)>;
+               chan-width = <DRAM_CHANNEL_WIDTH_X16>;
+               addr-mode = <DRAM_ADDR_MODE0>;
+               refresh-rate = <DRAM_REFRESH_RATE_785US>;
+               sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
+               ron-value = <DRAM_RON_34OHM>;
+               rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
+               rd-odt-value = <DRAM_RD_ODT_OFF>;
+               dram-density = <DRAM_DENSITY_1G>;
+               dram-cl = <6>;
+               dram-ras = <0x0000927c>;
+               dram-wtr = <0x00002710>;
+               dram-rrd = <0x00002710>;
+               dram-faw = <0x00009c40>;
+       };
+
        pci {
                #address-cells = <3>;
                #size-cells = <2>;
                };
        };
 
+       gpioa {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0 0x20>;
+               bank-name = "A";
+       };
+
+       gpiob {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x20 0x20>;
+               bank-name = "B";
+       };
+
+       spi {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "intel,ich-spi";
+               spi-flash@0 {
+                       #size-cells = <1>;
+                       #address-cells = <1>;
+                       reg = <0>;
+                       compatible = "winbond,w25q64", "spi-flash";
+                       memory-map = <0xff800000 0x00800000>;
+               };
+       };
+
 };