x86: Set up edge triggering on interrupt 9

[u-boot] / arch / x86 / dts / link.dts

diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index f1b7bf094170457ae7d2310426f3aa489cb7bd47..932991604f7c9503af72210faefddebbabf941b9 100644 (file)
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -14,18 +14,21 @@
 
        gpioa {
                compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
                reg = <0 0x10>;
                bank-name = "A";
        };
 
        gpiob {
                compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
                reg = <0x30 0x10>;
                bank-name = "B";
        };
 
        gpioc {
                compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
                reg = <0x40 0x10>;
                bank-name = "C";
        };
@@ -38,6 +41,117 @@
        chosen { };
        memory { device_type = "memory"; reg = <0 0>; };
 
+       spd {
+               compatible = "memory-spd";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               elpida_4Gb_1600_x16 {
+                       reg = <0>;
+                       data = [92 10 0b 03 04 19 02 02
+                               03 52 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               20 08 3c 3c 01 40 83 81
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 11 42 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 02 fe 00
+                               11 52 00 00 00 07 7f 37
+                               45 42 4a 32 30 55 47 36
+                               45 42 55 30 2d 47 4e 2d
+                               46 20 30 20 02 fe 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00];
+               };
+               samsung_4Gb_1600_1.35v_x16 {
+                       reg = <1>;
+                       data = [92 11 0b 03 04 19 02 02
+                               03 11 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               f0 0a 3c 3c 01 40 83 01
+                               00 80 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 11 02 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 80 ce 01
+                               00 00 00 00 00 00 6a 04
+                               4d 34 37 31 42 35 36 37
+                               34 42 48 30 2d 59 4b 30
+                               20 20 00 00 80 ce 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00];
+                       };
+               micron_4Gb_1600_1.35v_x16 {
+                       reg = <2>;
+                       data = [92 11 0b 03 04 19 02 02
+                               03 11 01 08 0a 00 fe 00
+                               69 78 69 3c 69 11 18 81
+                               20 08 3c 3c 01 40 83 05
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 0f 01 02 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 80 2c 00
+                               00 00 00 00 00 00 ad 75
+                               34 4b 54 46 32 35 36 36
+                               34 48 5a 2d 31 47 36 45
+                               31 20 45 31 80 2c 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               00 00 00 00 00 00 00 00
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff
+                               ff ff ff ff ff ff ff ff];
+               };
+       };
+
        spi {
                #address-cells = <1>;
                #size-cells = <0>;