x86: qemu: Enable I/O APIC chip select on PIIX3

[u-boot] / arch / x86 / include / asm / arch-qemu / qemu.h

diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h
index 8d7e9861ca6eeb9aa622bf1a135a9fa0b844078c..8c8e4ac1f609416c3091ad9c421720134706191b 100644 (file)
--- a/arch/x86/include/asm/arch-qemu/qemu.h
+++ b/arch/x86/include/asm/arch-qemu/qemu.h
@@ -7,6 +7,21 @@
 #ifndef _ARCH_QEMU_H_
 #define _ARCH_QEMU_H_
 
+/* Programmable Attribute Map (PAM) Registers */
+#define I440FX_PAM             0x59
+#define Q35_PAM                        0x90
+#define PAM_NUM                        7
+#define PAM_RW                 0x33
+
+/* X-Bus Chip Select Register */
+#define XBCS                   0x4e
+#define APIC_EN                        (1 << 8)
+
+/* IDE Timing Register */
+#define IDE0_TIM               0x40
+#define IDE1_TIM               0x42
+#define IDE_DECODE_EN          (1 << 15)
+
 /* I/O Ports */
 #define CMOS_ADDR_PORT         0x70
 #define CMOS_DATA_PORT         0x71