+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ARCH_IRQ_H_
* IRQ N is available to be routed
* @lb_bdf: irq router's PCI bus/device/function number encoding
* @ibase: IBASE register block base address
+ * @actl_8bit: ACTL register width is 8-bit (for ICH series chipset)
+ * @actl_addr: ACTL register offset
*/
struct irq_router {
int config;
u16 irq_mask;
u32 bdf;
u32 ibase;
+ bool actl_8bit;
+ int actl_addr;
};
struct pirq_routing {
#define PIRQ_BITMAP 0xdef8
-/**
- * irq_router_common_init() - Perform common x86 interrupt init
- *
- * This creates the PIRQ routing table and routes the IRQs
- */
-int irq_router_common_init(struct udevice *dev);
-
#endif /* _ARCH_IRQ_H_ */