Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin

[u-boot] / board / amcc / kilauea / kilauea.c

diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index 77c0eb43641a46641ff388e5e8407134ea54df41..37ef06ef2a77648fd26c482ff2873afd9819a7f7 100644 (file)
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -25,6 +25,7 @@
 #include <ppc4xx.h>
 #include <ppc405.h>
 #include <libfdt.h>
+#include <fdt_support.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 
@@ -37,14 +38,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips   */
 
-void fpga_init(void)
-{
-       /*
-        * Set FPGA regs
-        */
-       out32(CFG_FPGA_BASE, 0xff570cc0);
-}
-
 /*
  * Board early initialization function
  */
@@ -199,8 +192,6 @@ int board_early_init_f (void)
         */
        mtsdr(SDR0_SRST, 0);
 
-       fpga_init();
-
        /* Configure 405EX for NAND usage */
        val = SDR0_CUST0_MUX_NDFC_SEL |
                SDR0_CUST0_NDFC_ENABLE |
@@ -209,6 +200,20 @@ int board_early_init_f (void)
                (0x80000000 >> (28 + CFG_NAND_CS));
        mtsdr(SDR0_CUST0, val);
 
+       /*
+        * Configure PFC (Pin Function Control) registers
+        * -> Enable USB
+        */
+       val = SDR0_PFC1_USBEN | SDR0_PFC1_USBBIGEN | SDR0_PFC1_GPT_FREQ;
+       mtsdr(SDR0_PFC1, val);
+
+       /*
+        * Configure FPGA register with PCIe reset
+        */
+       out_be32((void *)CFG_FPGA_BASE, 0xff570cc4);    /* assert PCIe reset */
+       mdelay(50);
+       out_be32((void *)CFG_FPGA_BASE, 0xff570cc7);    /* deassert PCIe reset */
+
        return 0;
 }
 
@@ -289,45 +294,6 @@ int pci_pre_init(struct pci_controller * hose )
 }
 #endif  /* defined(CONFIG_PCI) */
 
-/*************************************************************************
- *  pci_target_init
- *
- *      The bootstrap configuration provides default settings for the pci
- *      inbound map (PIM). But the bootstrap config choices are limited and
- *      may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller * hose )
-{
-       /*-------------------------------------------------------------------+
-        * Disable everything
-        *-------------------------------------------------------------------*/
-       out32r( PCIX0_PIM0SA, 0 ); /* disable */
-       out32r( PCIX0_PIM1SA, 0 ); /* disable */
-       out32r( PCIX0_PIM2SA, 0 ); /* disable */
-       out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
-       /*-------------------------------------------------------------------+
-        * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
-        * strapping options to not support sizes such as 128/256 MB.
-        *-------------------------------------------------------------------*/
-       out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
-       out32r( PCIX0_PIM0LAH, 0 );
-       out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
-       out32r( PCIX0_BAR0, 0 );
-
-       /*-------------------------------------------------------------------+
-        * Program the board's subsystem id/vendor id
-        *-------------------------------------------------------------------*/
-       out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
-       out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
-
-       out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
 #ifdef CONFIG_PCI
 static struct pci_controller pcie_hose[2] = {{0},{0}};
 
@@ -342,15 +308,13 @@ void pcie_setup_hoses(int busno)
 
        for (i = 0; i < board_pcie_count(); i++) {
 
-               if (is_end_point(i)) {
-                       printf("PCIE%d: will be configured as endpoint\n", i);
+               if (is_end_point(i))
                        ret = ppc4xx_init_pcie_endport(i);
-               } else {
-                       printf("PCIE%d: will be configured as root-complex\n", i);
+               else
                        ret = ppc4xx_init_pcie_rootport(i);
-               }
                if (ret) {
-                       printf("PCIE%d: initialization failed\n", i);
+                       printf("PCIE%d: initialization as %s failed\n", i,
+                              is_end_point(i) ? "endpoint" : "root-complex");
                        continue;
                }