mmc: arm_pl180_mmci: update arm_pl180_mmci_init() prototype

[u-boot] / board / armltd / vexpress / vexpress_common.c

diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index cb2de2f4ddc954f884612430e1edeb9396046d00..37b8d7f4f5fab77a3edd733e1d01cd87fc272dbf 100644 (file)
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -21,6 +21,7 @@
 #include <errno.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <asm/mach-types.h>
 #include <asm/arch/systimer.h>
 #include <asm/arch/sysctrl.h>
 #include <asm/arch/wdt.h>
@@ -75,6 +76,7 @@ int cpu_mmc_init(bd_t *bis)
        (void) bis;
 #ifdef CONFIG_ARM_PL180_MMCI
        struct pl180_mmc_host *host;
+       struct mmc *mmc;
 
        host = malloc(sizeof(struct pl180_mmc_host));
        if (!host)
@@ -90,7 +92,7 @@ int cpu_mmc_init(bd_t *bis)
        host->clock_in = ARM_MCLK;
        host->clock_min = ARM_MCLK / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
        host->clock_max = CONFIG_ARM_PL180_MMCI_CLOCK_FREQ;
-       rc = arm_pl180_mmci_init(host);
+       rc = arm_pl180_mmci_init(host, &mmc);
 #endif
        return rc;
 }
@@ -109,7 +111,7 @@ int dram_init(void)
        return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size =
@@ -117,6 +119,8 @@ void dram_init_banksize(void)
        gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
        gd->bd->bi_dram[1].size =
                        get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+
+       return 0;
 }
 
 /*
@@ -181,7 +185,7 @@ ulong get_board_rev(void){
        return readl((u32 *)SYS_ID);
 }
 
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+#ifdef CONFIG_ARMV7_NONSEC
 /* Setting the address at which secondary cores start from.
  * Versatile Express uses one address for all cores, so ignore corenr
  */