travis-ci: Drop 'TEST_CMD'

[u-boot] / board / atmel / sama5d4ek / sama5d4ek.c

diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c
index 46e504131c8ca43f5e24033aea2deddd417e0841..72bad230871d1994f489bf92f79750ffdb9afa39 100644 (file)
--- a/board/atmel/sama5d4ek/sama5d4ek.c
+++ b/board/atmel/sama5d4ek/sama5d4ek.c
@@ -8,7 +8,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/atmel_mpddrc.h>
 #include <asm/arch/atmel_usba_udc.h>
@@ -24,6 +23,7 @@
 #include <netdev.h>
 #include <nand.h>
 #include <spi.h>
+#include <version.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -174,6 +174,7 @@ void lcd_show_board_info(void)
        int i;
        char temp[32];
 
+       lcd_printf("%s\n", U_BOOT_VERSION);
        lcd_printf("2014 ATMEL Corp\n");
        lcd_printf("at91@atmel.com\n");
        lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
@@ -186,7 +187,7 @@ void lcd_show_board_info(void)
        nand_size = 0;
 #ifdef CONFIG_NAND_ATMEL
        for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += nand_info[i].size;
+               nand_size += nand_info[i]->size;
 #endif
        lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
                   dram_size >> 20, nand_size >> 20);
@@ -340,7 +341,7 @@ void spl_board_init(void)
 #endif
 }
 
-static void ddr2_conf(struct atmel_mpddr *ddr2)
+static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
 {
        ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
 
@@ -377,22 +378,20 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-       struct atmel_mpddr ddr2;
+       struct atmel_mpddrc_config ddr2;
 
        ddr2_conf(&ddr2);
 
-       /* enable MPDDR clock */
+       /* Enable MPDDR clock */
        at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-       writel(0x4, &pmc->scer);
+       at91_system_clk_enable(AT91_PMC_DDR);
 
        /* DDRAM2 Controller initialize */
-       ddr2_init(ATMEL_BASE_DDRCS, &ddr2);
+       ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
 }
 
 void at91_pmc_init(void)
 {
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
        u32 tmp;
 
        tmp = AT91_PMC_PLLAR_29 |
@@ -401,7 +400,7 @@ void at91_pmc_init(void)
              AT91_PMC_PLLXR_DIV(1);
        at91_plla_init(tmp);
 
-       writel(0x0 << 8, &pmc->pllicpr);
+       at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x0));
 
        tmp = AT91_PMC_MCKR_H32MXDIV |
              AT91_PMC_MCKR_PLLADIV_2 |