Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[u-boot] / board / atum8548 / atum8548.c

diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 2ef19ce696467d0edff6dab1e5738a0e9b7b551b..7b7a968a71544700578b7b536bc35d3c69e2e939 100644 (file)
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -182,6 +182,9 @@ static struct pci_controller pcie1_hose;
 
 int first_free_busno=0;
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 void
 pci_init_board(void)
 {
@@ -211,10 +214,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie1_hose;
        int pcie_ep = (host_agent == 5);
        int pcie_configured  = io_sel & 6;
+       struct pci_region *r = hose->regions;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
                printf ("\n    PCIE1 connected to slot as %s (base address %x)",
@@ -227,36 +230,31 @@ pci_init_board(void)
                printf ("\n");
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE,
                               CONFIG_SYS_PCIE1_MEM_PHYS,
                               CONFIG_SYS_PCIE1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_IO_BASE,
                               CONFIG_SYS_PCIE1_IO_PHYS,
                               CONFIG_SYS_PCIE1_IO_SIZE,
                               PCI_REGION_IO);
 
-               hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE1_MEM_BASE2
                /* outbound memory */
-               pci_set_region(hose->regions + 3,
+               pci_set_region(r++,
                               CONFIG_SYS_PCIE1_MEM_BASE2,
                               CONFIG_SYS_PCIE1_MEM_PHYS2,
                               CONFIG_SYS_PCIE1_MEM_SIZE2,
                               PCI_REGION_MEM);
-               hose->region_count++;
 #endif
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
 
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
@@ -279,8 +277,8 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-       extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci1_hose;
+       struct pci_region *r = hose->regions;
 
        uint pci_agent = (host_agent == 6);
        uint pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
@@ -300,26 +298,22 @@ pci_init_board(void)
                        );
 
                /* inbound */
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
                /* outbound memory */
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_MEM_BASE,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI1_IO_BASE,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -340,26 +334,23 @@ pci_init_board(void)
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
        extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pci2_hose;
+       struct pci_region *r = hose->regions;
 
        if (!(devdisr & MPC85xx_DEVDISR_PCI2)) {
-               pci_set_region(hose->regions + 0,
-                              CONFIG_SYS_PCI_MEMORY_BUS,
-                              CONFIG_SYS_PCI_MEMORY_PHYS,
-                              CONFIG_SYS_PCI_MEMORY_SIZE,
-                              PCI_REGION_MEM | PCI_REGION_MEMORY);
+               r += fsl_pci_setup_inbound_windows(r);
 
-               pci_set_region(hose->regions + 1,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI2_MEM_BASE,
                               CONFIG_SYS_PCI2_MEM_PHYS,
                               CONFIG_SYS_PCI2_MEM_SIZE,
                               PCI_REGION_MEM);
 
-               pci_set_region(hose->regions + 2,
+               pci_set_region(r++,
                               CONFIG_SYS_PCI2_IO_BASE,
                               CONFIG_SYS_PCI2_IO_PHYS,
                               CONFIG_SYS_PCI2_IO_SIZE,
                               PCI_REGION_IO);
-               hose->region_count = 3;
+               hose->region_count = r - hose->regions;
                hose->first_busno=first_free_busno;
                pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
 
@@ -385,39 +376,21 @@ int last_stage_init(void)
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
+extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+                        struct pci_controller *hose);
 
-void
-ft_board_setup(void *blob, bd_t *bd)
+void ft_board_setup(void *blob, bd_t *bd)
 {
-       int node, tmp[2];
-       const char *path;
-
        ft_cpu_setup(blob, bd);
 
-       node = fdt_path_offset(blob, "/aliases");
-       tmp[0] = 0;
-       if (node >= 0) {
 #ifdef CONFIG_PCI1
-               path = fdt_getprop(blob, node, "pci0", NULL);
-               if (path) {
-                       tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
 #endif
 #ifdef CONFIG_PCI2
-               path = fdt_getprop(blob, node, "pci1", NULL);
-               if (path) {
-                       tmp[1] = pci2_hose.last_busno - pci2_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci1", &pci2_hose);
 #endif
 #ifdef CONFIG_PCIE1
-               path = fdt_getprop(blob, node, "pci2", NULL);
-               if (path) {
-                       tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
-                       do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
-               }
+       ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif
-       }
 }
 #endif