MX51EVK: Remove CPLD related code

[u-boot] / board / bf548-ezkit / bf548-ezkit.c

diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c
index 74f93ba27da73bc53444dd1e2b849a4910593ea1..65fb81a9c5906ac00cae5eff90cc8f9910804692 100644 (file)
--- a/board/bf548-ezkit/bf548-ezkit.c
+++ b/board/bf548-ezkit/bf548-ezkit.c
@@ -7,9 +7,11 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <config.h>
 #include <command.h>
 #include <asm/blackfin.h>
+#include <asm/sdh.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -20,13 +22,6 @@ int checkboard(void)
        return 0;
 }
 
-phys_size_t initdram(int board_type)
-{
-       gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
-       gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
-       return gd->bd->bi_memsize;
-}
-
 int board_early_init_f(void)
 {
        /* Port H: PH8 - PH13 == A4 - A9
@@ -77,3 +72,33 @@ int board_early_init_f(void)
 
        return 0;
 }
+
+#ifdef CONFIG_SMC911X
+int board_eth_init(bd_t *bis)
+{
+       return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+}
+#endif
+
+#ifdef CONFIG_BFIN_SDH
+int board_mmc_init(bd_t *bis)
+{
+       return bfin_mmc_init(bis);
+}
+#endif
+
+#ifdef CONFIG_USB_BLACKFIN
+void board_musb_init(void)
+{
+       /*
+        * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both device
+        * and OTG host modes, while rev 1.1 and greater require PE7 to
+        * be low for device mode and high for host mode.  We set it high
+        * here because we are in host mode.
+        */
+       bfin_write_PORTE_FER(bfin_read_PORTE_FER() & ~PE7);
+       bfin_write_PORTE_DIR_SET(PE7);
+       bfin_write_PORTE_SET(PE7);
+       SSYNC();
+}
+#endif