]> git.sur5r.net Git - u-boot/blobdiff - board/colibri_pxa270/colibri_pxa270.c
Merge branch 'for-wd-master' of git://git.denx.de/u-boot-pxa
[u-boot] / board / colibri_pxa270 / colibri_pxa270.c
index 84ec38e4a22966692b1336c63043edc6bb518d81..191fb333e40ff53f9aba9c7c414b16fe2898df4d 100644 (file)
@@ -22,6 +22,7 @@
 #include <common.h>
 #include <asm/arch/hardware.h>
 #include <netdev.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -41,8 +42,9 @@ struct serial_device *default_serial_console (void)
 
 int board_init (void)
 {
-       /* memory and cpu-speed are setup before relocation */
-       /* so we do _nothing_ here */
+       /* We have RAM, disable cache */
+       dcache_disable();
+       icache_disable();
 
        /* arch number of vpac270 */
        gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
@@ -53,40 +55,47 @@ int board_init (void)
        return 0;
 }
 
-int dram_init (void)
+extern void pxa_dram_init(void);
+int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       pxa_dram_init();
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+       return 0;
+}
 
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-       return 0;
 }
 
 #ifdef CONFIG_CMD_USB
 int usb_board_init(void)
 {
-       UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
-               ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
+       writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
+               ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
+               UHCHR);
 
-       UHCHR |= UHCHR_FSBIR;
+       writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
 
        while (UHCHR & UHCHR_FSBIR);
 
-       UHCHR &= ~UHCHR_SSE;
-       UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
+       writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
+       writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
 
        /* Clear any OTG Pin Hold */
-       if (PSSR & PSSR_OTGPH)
-               PSSR |= PSSR_OTGPH;
+       if (readl(PSSR) & PSSR_OTGPH)
+               writel(readl(PSSR) | PSSR_OTGPH, PSSR);
 
-       UHCRHDA &= ~(0x200);
-       UHCRHDA |= 0x100;
+       writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
+       writel(readl(UHCRHDA) | 0x100, UHCRHDA);
 
        /* Set port power control mask bits, only 3 ports. */
-       UHCRHDB |= (0x7<<17);
+       writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
 
        /* enable port 2 */
-       UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
+       writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
+               UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
 
        return 0;
 }
@@ -98,14 +107,14 @@ void usb_board_init_fail(void)
 
 void usb_board_stop(void)
 {
-       UHCHR |= UHCHR_FHR;
+       writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
        udelay(11);
-       UHCHR &= ~UHCHR_FHR;
+       writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 
-       UHCCOMS |= 1;
+       writel(readl(UHCCOMS) | 1, UHCCOMS);
        udelay(10);
 
-       CKEN &= ~CKEN10_USBHOST;
+       writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 
        return;
 }